w83c554f Winbond Electronics Corp America, w83c554f Datasheet - Page 37

• Manufacturer Part Number: w83c554f
• Description: System I/o Controller With Pci Arbiter & Ultradma/33 Ide Controller
• Manufacturer: Winbond Electronics Corp America

W83C554F
System Architecture
3.8
PCI Configuration Read Cycle
The Configuration Read command (C/BE[3:0]# = Ah during address phase) is used in slave mode to read the configuration
registers. 8-bit, 16-bit, 24-bit and 32-bit accesses are supported when the IDSEL is asserted and AD[1:0] are 00. The PCI
controller will respond to all Configuration Read cycles, even for bytes not used. A value of 00h will be read for each invalid
byte selected in the configuration address space. During the PCI address phase AD[7:2] define the DWORD accessed, while
the byte enables (C/BE[3:0]#) address the byte(s) within each DWORD.
Refer to Figure 3-4. The Slave Configuration Read command cycle is used by the host processor to read the PCI
configuration space in the W83C554F. This provides the processor with device information. It is a single, non-burst, 8, 16
or 32-bit transfer, of fixed duration, i.e. the W83C554F will assert TRDY# on the 4th bus cycle of the transfer.
Figure 3-4. Slave Configuration Read
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