hdmp-1526 ETC-unknow, hdmp-1526 Datasheet
hdmp-1526
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hdmp-1526 Summary of contents
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... Mass Storage System I/O Channel • Work Station/Server I/O Channel • High Speed Proprietary Interface Description The HDMP-1526 transceiver is a single silicon bipolar integrated circuit packaged in an EDQuad package. It provides a low-cost, low-power physical layer solution for 1062.5 MBd Fibre Channel or proprietary link interfaces. It ...
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... PROTOCOL DEVICE BYTSYNC REFCLK ENBYTSYNC -LCKREF Figure 1. Typical Application Using the HDMP-1526. DATA BYTE FRAME TX[0-9] MUX TX TXCAP0 PLL/CLOCK TXCAP1 GENERATOR REFCLK -LCKREF RXCAP0 RXCAP1 RBC0 RBC1 FRAME DATA BYTE DEMUX RX[0-9] AND BYTE SYNC BYTSYNC ENBYTSYNC Figure 2. HDMP-1526 Transceiver Block Diagram. HDMP-1526 ...
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Figure 3). This clock is multiplied generate the 1062.5 MHz clock necessary for the high-speed serial outputs. FRAME MUX The FRAME MUX accepts the 10- bit wide parallel data from the INPUT LATCH. Using ...
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... HDMP-1526 (Transmitter Section) Timing Characteristics + 4 5. Symbol Parameter t Setup Time setup t Hold Time hold [1] t_txlat Transmitter Latency Note: 1. The transmitter latency, as shown in Figure 4, is defined as the time between the latching in of the parallel data word (as triggered by the rising edge of the transmit byte clock, REFCLK) and the transmission of the first serial bit of that parallel word (defined by the rising edge of the first bit transmitted) ...
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... HDMP-1526 (Receiver Section) Timing Characteristics + 4 5. Symbol [1,2] b_sync Bit Sync Time [2] f_lock Frequency Lock Time (from Time of Setting -LCKREF = 0) [2] f_lock_rate Frequency Lock Rate (when -LCKREF = 0) t Time Data Valid Before Rising Edge of RBC valid_before t Time Data Valid After Rising Edge of RBC ...
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... Symbol f Nominal Frequency (for Fibre Channel Compliance) F Frequency Tolerance tol Symm Symmetry (Duty Cycle) HDMP-1526 (Trx) DC Electrical Specifications + 4 5. Symbol V TTL Input High Voltage Level, Guaranteed High Signal IH,TTL for All TTL Inputs ...
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... HDMP-1526 (TRx) AC Electrical Specifications + 4 5. Symbol t Input TTL Rise Time, 0.8 to 2.0 Volts r,TTLin t Input TTL Fall Time, 2.0 to 0.8 Volts f,TTLin t Output TTL Rise Time, 0.8 to 2.0 Volts Load r,TTLout t Output TTL Fall Time, 2.0 to 0.8 Volts Load f,TTLout [1,2] t HS_OUT Single-Ended (+DOUT) Rise Time ...
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... HDMP-1526 (Transmitter Section) Output Jitter Characteristics + 4 5. Symbol [1] RJ Random Jitter at DOUT, the High Speed Electrical Data Port, specified as 1 sigma deviation of the 50% crossing point [1] DJ Deterministic Jitter at DOUT, the High Speed Electrical Data Port Note: 1 ...
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... Input TTL. Floats High When Left Open. O-TTL Output TTL HS_OUT High Speed Output. ECL Compatible HS_IN High Speed Input, Internally Biased, High Input Resistance C External Circuit Node S Power Supply or Ground HDMP-1526 (TRx) Pin Input Capacitance Symbol C Pin Input Capacitance INPUT O_TTL V _TTL CC 800 ...
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... COUNTRY TX[ TX[9] GND_TXTTL 14 GND_TXA 15 16 TXCAP1 xxxx = WAFER LOT NUMBER YYWW = DATE CODE (YY = YEAR WORK WEEK) COUNTRY = COUNTRY OF MANUFACTURE Figure 11. HDMP-1526 (TRx) Package Layout and Marking, Top View. 48 RXCAP0 47 BYTSYNC 46 GND_RXTTL 45 RX[0] 44 RX[1] 43 RX[ ...
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TRx I/O Definition Name Pin Type GND_TXTTL 1 S TTL Transmitter Ground: Normally 0 volts. Used for the TTL input cells 14 of the transmitter section. TX[0] 2 I-TTL Data Inputs: One, 10 bit, pre-encoded data byte. TX[0] is the ...
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TRx I/O Definition (cont’d.) Name Pin Type VCC_RXTTL RBC1 30 O-TTL RBC0 31 GND_RXTTL RX[0] 45 O-TTL RX[1] 44 RX[2] 43 RX[3] 41 RX[4] 40 RX[5] 39 RX[6] 38 RX[7] 36 RX[8] ...
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... ARE 0.1 µF. THE PLL FILTER CAPACITORS ARE 0.01 µF. Figure 12. Power Supply Bypass. the power dissipated by the directly connected to the ambient environment, thereby minimizing the jc of the device. COPPER HEATSINK NICKEL PLATING WIRE BOND DIE Figure 13. Package Cross Section of HDMP-1526 PLLR ...
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... ALL DIMENSIONS ARE IN MILLIMETERS. Figure 14. Mechanical Dimensions of HDMP-1526. Assembly Handling Information Caution: Parts must be kept in dry pack, or baked out before IR reflow. Refer to package moisture label for more details. Details ...