hdmp-1526 ETC-unknow, hdmp-1526 Datasheet - Page 9
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hdmp-1526
Manufacturer Part Number
hdmp-1526
Description
Fibre Channel Transceiver Chip
Manufacturer
ETC-unknow
Datasheet
1.HDMP-1526.pdf
(14 pages)
I/O Type Definitions
HDMP-1526 (TRx)
Pin Input Capacitance
Figure 9. O-TTL and I-TTL Simplified Circuit Schematic.
Figure 10. HS_OUT and HS_IN Simplified Circuit Schematic.
Notes:
1. HS_IN inputs should never be connected to ground as permanent damage to the device may result.
2. 75
690
O_TTL
800
V
Symbol
C
CC
serial padding resistors are optional, the serial resistors should be matched to the receiver input bias resistors.
INPUT
I/O Type
_TTL
HS_OUT
6 k
O-TTL
HS_IN
I-TTL
60 µA
C
S
GND_TTL
60 µA
72
36
HS_OUT
Pin Input Capacitance
PROTECTION
PROTECTION
ESD
ESD
Input TTL. Floats High When Left Open.
Output TTL
High Speed Output. ECL Compatible
High Speed Input, Internally Biased, High Input Resistance
External Circuit Node
Power Supply or Ground
Parameter
+DOUT
-DOUT
V
V
GND
V
V
V
CC
CC
270
CC
CC
CC
GND
or
_RX
270
_TX
_TXHS
_TXECL
_TX
75
75
PROTECTION
GND_TXHS
ESD
Zo = 75
Zo = 75
0.01 µF
0.01 µF
Definition
GND_RXHS
V
CC
V
75
75
_RXHS
CC
10 k
GND_TTL
V
GND
_RX
CC
0.01 µF
_TTL
+DIN
-DIN
Units
I_TTL
pF
10 k
PROTECTION
ESD
V
BB
3.2 K
2 V
1.4 V
HS_IN
Typ.
1.6
+
–
+
–
3.2 K
2 V
Max.
4.0