k9f4g08u0m-y Samsung Semiconductor, Inc., k9f4g08u0m-y Datasheet - Page 10

• Manufacturer Part Number: k9f4g08u0m-y
• Description: 512m X 8 Bits / 1g X 8 Bits Nand Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

K9K8G08U1M
K9F4G08U0M
AC TEST CONDITION
(K9F4G08U0M-XCB0 :T
MODE SELECTION
NOTE : 1. X can be V
CAPACITANCE
NOTE : Capacitance is periodically sampled and not 100% tested.
VALID BLOCK
NOTE :
1. The device may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid blocks is pre-
2. The 1st block, which is placed on 00h block address, is guaranteed to be a valid block, does not require Error Correction up to 1K program/erase
* : Each K9F4G08U0M chip in the K9K8G08U1M has Maximun 80 invalid block.
K9F4G08U0M : Vcc=2.7V~3.6V unless otherwise noted)
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
Input/Output Capacitance
Input Capacitance
K9F4G08U0M
K9K8G08U1M
sented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits. Do not erase or program
factory-marked bad blocks. Refer to the attached technical notes for appropriate management of invalid blocks.
cycles.
CLE
H
H
X
X
X
X
X
L
L
L
L
2. WP should be biased to CMOS high or CMOS low for standby.
Parameter
Item
ALE
IL
X
H
H
X
X
X
X
L
L
L
L
or V
(1)
(
T
A
A
IH.
=0 to 70 C, K9F4G08U0M-XIB0:T
=25 C, V
Parameter
CE
H
L
L
L
L
L
L
X
X
X
X
CC
=3.3V, f=1.0MHz)
Symbol
Symbol
C
N
N
C
I/O
VB
VB
IN
WE
H
X
X
X
X
X
Test Condition
A
V
V
=-40 to 85 C
8,032*
4,016
IN
IL
RE
Min
H
H
H
H
H
H
X
X
X
X
=0V
=0V
10
0V/V
WP
H
H
H
H
H
X
X
X
X
L
CC
(2)
Typ.
Min
-
-
-
-
1 TTL GATE and CL=50pF
Read Mode
Data Input
Data Output
During Read(Busy)
During Program(Busy)
During Erase(Busy)
Write Protect
Stand-by
Write Mode
K9F4G08U0M
0V to Vcc
Vcc/2
5ns
FLASH MEMORY
Command Input
Address Input(5clock)
Command Input
Address Input(5clock)
8,192*
4,096
Max
Max
10
10
Mode
Advance
Blocks
Blocks
Unit
Unit
pF
pF