gsc24bc01 E-Tech Electronics LTD, gsc24bc01 Datasheet - Page 4

• Manufacturer Part Number: gsc24bc01
• Description: 2-wire Serial Eeproms
• Manufacturer: E-Tech Electronics LTD

AC Characteristics
V
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time
Clock Low to Data Out Valid
Time the bus must be free before
a new transmission can start
Start Hold Time
Start Setup Time
Data in Hold Time
Data in Setup Time
Input Rise Time
Input Fall Time
Stop Setup Time
Data Out Hold Time
Write Cycle Time
5.0V, 25 : , Byte Mode
Note: 1. This parameter is characterized and not 100% tested.
Device Operation
Clock and Data Transitions: Transitions on the SDA pin should only occur when SCL is low (refer to the Data
Validity timing diagram in Figure 5). If the SDA pin changes when SCL is high, then the transition will be
interpreted as a START or STOP condition.
START Condition: A START condition occurs when the SDA transitions form high to low when SCL is high.
The START signal is usually used to initiate a command (refer to the Start and Stop Definition timing diagram in
Figure 6).
STOP Condition: A STOP condition occurs when the SDA transitions form low to high when SCL is high (refer
to Figure 6. START and STOP Definition timing diagram). The STOP command will put the device into standby
mode after no acknowledgment is issued during the read sequence.
Acknowledge: An acknowledgement is sent by pulling the SDA low to confirm that a word has been
successfully received. All addresses and data words are serially transmitted to and from the EEPROM in 8-bit
words, so acknowledgments are usually issued during the 9
Standby Mode: Standby mode is entered when the chip is initially powered-on or after a STOP command has
been issued and any internal operations have been completed. .
Memory Reset: In the event of unexpected power or connection loss, a START condition can be issued to
restart the input command sequence. If the device is currently in write cycle mode, this command will be
ignored.
GSC24BC01/02/02/04/08/16
CC
=+1.8 ~ 5.5V, C
Parameter
(1)
(1)
L
=1 TTL Gate & 100pF
Applicable over recommended operating range from: T
(1)
(1)
Endurance
Symbol
t
t
t
t
t
HD.STA
HD.DAT
US.DAT
SU.STO
SU.STA
t
t
t
f
HIGH
LOW
t
t
SCL
t
BUF
WR
t
DH
(1)
t
AA
t
R
F
I
(unless otherwise noted)
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
=1.8V
=2.7 ~ 5.5V
Test Condition
th
clock cycle.
Min
200
100
100
4.7
1.2
4.0
0.6
0.1
0.1
4.7
1.2
4.0
0.6
4.7
0.6
4.7
0.6
1M
1M
50
A
0
0
-
-
-
-
-
=-40 ~ +85 : ,
TYP
ISSUED DATE :2006/06/14
REVISED DATE :
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
100
400
100
300
300
4.5
0.9
1.0
0.3
50
5
5
-
-
-
-
-
-
-
-
-
-
Page: 4/9
Write
Cycles
Unit
KHz
ms
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s