k7i161882b Samsung Semiconductor, Inc., k7i161882b Datasheet - Page 9

• Manufacturer Part Number: k7i161882b
• Description: 512kx36-bit, 1mx18-bit Ddrii Cio B2 Sram
• Manufacturer: Samsung Semiconductor, Inc.

K7I163682B
K7I161882B
TRUTH TABLES
SYNCHRONOUS TRUTH TABLE
Notes: 1. X means "Don′t Care".
WRITE TRUTH TABLE
Notes: 1. X means "Don′t Care".
WRITE TRUTH TABLE
Notes: 1. X means "Don′t Care".
Stopped
K
↑
↑
↑
↑
↑
2. The rising edge of clock is symbolized by ( ↑ ).
3. Before enter into clock stop status, all pending read and write operations will be completed.
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K ( ↑ ).
3. Assumes a WRITE cycle was initiated.
4. This table illustrates operation for x18 devices.
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K ( ↑ ).
3. Assumes a WRITE cycle was initiated.
K
K
↑
↑
↑
↑
↑
↑
↑
K
↑
↑
↑
↑
↑
LD
X
H
L
L
K
↑
↑
↑
↑
(x18)
(x36)
BW
H
H
H
H
H
H
L
L
L
L
0
R/W
BW
X
X
H
L
H
H
H
H
L
L
L
L
0
BW
H
H
H
H
H
H
L
L
L
L
1
Q
Previous state
BW
BW
Din at K(t+1)
OUT
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
High-Z
Q(A0)
1
2
at C(t+1)
512Kx36 & 1Mx18 DDRII CIO b2 SRAM
- 9 -
BW
H
H
H
H
H
H
L
L
L
L
3
Q
Q
Previous state
WRITE ALL BYTEs ( K↑ )
WRITE ALL BYTEs ( K↑ )
Din at K(t+1)
WRITE NOTHING ( K↑ )
WRITE NOTHING ( K↑ )
WRITE BYTE 2 and BYTE 3 ( K↑ )
WRITE BYTE 2 and BYTE 3 ( K↑ )
OUT
WRITE BYTE 0 ( K↑ )
WRITE BYTE 0 ( K↑ )
WRITE BYTE 1 ( K↑ )
WRITE BYTE 1 ( K↑ )
High-Z
Q(A1)
at C(t+2)
WRITE ALL BYTEs ( K↑ )
WRITE ALL BYTEs ( K↑ )
OPERATION
WRITE NOTHING ( K↑ )
WRITE NOTHING ( K↑ )
WRITE BYTE 0 ( K↑ )
WRITE BYTE 0 ( K↑ )
WRITE BYTE 1 ( K↑ )
WRITE BYTE 1 ( K↑ )
OPERATION
Rev. 5.0 July 2006
OPERATION
No Operation
Clock Stop
Read
Write