k6r1016c1d Samsung Semiconductor, Inc., k6r1016c1d Datasheet - Page 3

• Manufacturer Part Number: k6r1016c1d
• Description: 64kx16 Bit High-speed Cmos Static Ram 5.0v Operating . Operated At Commercial And Industrial Temperature Ranges.
• Manufacturer: Samsung Semiconductor, Inc.

FUNCTIONAL BLOCK DIAGRAM
K6R1016C1D
64K x 16 Bit High-Speed CMOS Static RAM
FEATURES
• Fast Access Time 10(Max.)
• Power Dissipation
• Single 5.0V±10% Power Supply
• TTL Compatible Inputs and Outputs
• I/O Compatible with 3.3V Device
• Fully Static Operation
• Three State Outputs
• Center Power/Ground Pin Configuration
• Data Byte Control: LB: I/O
• Standard Pin Configuration:
• Operating in Commercial and Industrial Temperature range.
CS
WE
OE
UB
LB
A
A
A
A
A
A
A
A
A
- No Clock or Refresh required
0
I/O
Standby (TTL)
Operating K6R1016C1D-10 : 65mA(Max.)
1
2
3
4
5
6
7
8
I/O
1
9
~I/O
~I/O
8
16
K6R1016C1D-J : 44-SOJ-400
K6R1016C1D-K : 44-SOJ-400(Lead-Free)
K6R1016C1D-T : 44-TSOP2-400BF
K6R1016C1D-U : 44-TSOP2-400BF(Lead-Free)
K6R1016C1D-E: 48-TBGA ( 6.0mm X 7.0mm )
(CMOS) :
with 0.75 ball pitch
Clk Gen.
: 20mA(Max.)
Data
Cont.
Data
Cont.
Gen.
CLK
5mA(Max.)
1
~ I/O
A
8
9
, UB: I/O
Pre-Charge Circuit
A
128x16 Columns
10
Column Select
Memory Array
I/O Circuit &
A
512 Rows
11
A
9
~ I/O
12
A
13
16
A
14
A
15
- 3 -
GENERAL DESCRIPTION
PIN FUNCTION
The K6R1016C1D is a 1,048,576-bit high-speed Static Random
Access Memory organized as 65,536 words by 16 bits. The
K6R1016C1D uses 16 common input and output lines and has
at output enable pin which operates faster than address access
time at read cycle. Also it allows that lower and upper byte
access by data byte control (UB, LB). The device is fabricated
using SAMSUNG′s advanced CMOS process and designed for
high-speed circuit technology. It is particularly well suited for
use in high-density high-speed system applications. The
K6R1016C1D is packaged in a 400mil 44-pin plastic SOJ or
TSOP2 forward or 48-TBGA.
I/O
Pin Name
A
1
0
V
V
N.C
WE
CS
OE
UB
LB
~ I/O
- A
CC
SS
15
16
Address Inputs
Write Enable
Chip Select
Output Enable
Lower-byte Control(I/O
Upper-byte Control(I/O
Data Inputs/Outputs
Power(+5.0V)
Ground
No Connection
PRELIMINARY
Pin Function
CMOS SRAM
1
9
~I/O
~I/O
8
16
)
)
July 2004
Rev. 3.0