qh25f320s33b8 Numonyx, qh25f320s33b8 Datasheet - Page 33

• Manufacturer Part Number: qh25f320s33b8
• Description: Numonyx? Serial Flash Memory S33
• Manufacturer: Numonyx

Numonyx™ Serial Flash Memory (S33)
Figure 15: Timing Diagram for SPI Fast Read Command Sequence
8.4.2
December 2007
Order Number: 314822-03
S#
Q
C
D
bring it high again. When the internal address reaches the last address within the
device’s range, it will wrap to address 0h. When the user brings S# high, the
instruction cycle is terminated, and the data output (Q) becomes tri-stated.
Page Program
A Page Program instruction consists of an OP Code (02h) followed by a 3-byte address
and a variable number of data bytes, up to the size of the program buffer (page).
Assuming S# goes high on a whole-byte increment, the SPI module will instruct the
WSM to initiate programming, otherwise the Page Program instruction will botch (and
nothing will be programmed). The timing diagram for a Page Program command
sequence can be found in
Sequence” on page
To monitor when the program algorithm is complete, a Read SR command must be
issued. The Read SR command is the only instruction that the device will recognize
while a write is in process.
0
S#
1
Q
C
D
2
Instruction
Instruction
Dummy Byte
3
S#
4
Q
C
D
D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7
Data Byte (Addr+1)
Data Byte (Addr+1)
5
34.
6
Figure 16, “Timing Diagram for SPI Page Program Command
7
A23 A22 A21 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0 D7 D
1/Fc
1/Fc
Address
Address
29 30 31
Data Byte
Data Byte
Data Byte (Addr+2)
Data Byte (Addr+2)
Datasheet
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