m28f101-100xp6 STMicroelectronics, m28f101-100xp6 Datasheet - Page 17

• Manufacturer Part Number: m28f101-100xp6
• Description: 128k Chip Erase Flash Memory
• Manufacturer: STMicroelectronics

Figure 12. Erasing Flowchart
Limit: 1000 at grade 1; 6000 at grades 3 & 6.
PRESTO F ERASE ALGORITHM
The PRESTO F Erase Algorithm guarantees that
the device will be erased in a reliable way. The
algorithm first programms all bytes to 00h in order
to ensure uniform erasure. The programming fol-
lows the PRESTO F Programming Algorithm.
Erase is set-up by writing 20h to the command
register, the erasure is started by repeating this
write cycle. Erase Verify is set-up by writing A0h to
the command register together with the address of
the byte to be verified. The subsequent read cycle
reads the data which is compared to FFh. Erase
Verify begins at address 0000h and continues to
the last address or until the comparison of the data
to 0FFh fails. If this occurs, the address of the last
byte checked is stored and a new Erase operation
performed. Erase Verify then continues from the
address of the stored location.
V PP < 6.5V
FAIL
YES
NO
LIMIT
++n
READ DATA OUTPUT
NO
READ COMMAND
V PP < 6.5V, PASS
n=0, Addr=00000h
ERASE SET-UP
PROGRAM ALL
ERASE VERIFY
BYTES TO 00h
Latch Addr.
V PP = 12V
Wait 10ms
Wait 6 s
Data
Addr
Last
OK
YES
YES
NO
Addr++
AI00678
Figure 13. Programming Flowchart
PRESTO F PROGRAM ALGORITHM
The PRESTO F Programming Algorithm applies a
series of 10 s programming pulses to a byte until
a correct verify occurs. Up to 25 programming
operations are allowed for one byte. Program is
set-up by writing 40h to the command register, the
programming is started after the next write cycle
which also latches the address and data to be
programmed. Program Verify is set-up by writing
C0h to the command register, followed by a read
cycle and a compare of the data read to the data
expected. During Program and Program Verify op-
erations a MARGIN MODE circuit is activated to
guaranteethat the cell is programmed with a safety
margin.
V PP < 6.5V
FAIL
YES
NO
= 25
++n
READ DATA OUTPUT
PROGRAM SET-UP
PROGRAM VERIFY
V PP < 6.5V, PASS
NO
READ COMMAND
Latch Addr, Data
V PP = 12V
Wait 10 s
Wait 6 s
n = 0
Data
Addr
Last
OK
YES
YES
NO
Addr++
M28F101
AI00677
17/23