m28f008 Intel Corporation, m28f008 Datasheet - Page 15

• Manufacturer Part Number: m28f008
• Description: 8 Mbit 1 Mbit X 8 Flash Memory
• Manufacturer: Intel Corporation

Power Supply Decoupling
Flash memory power switching characteristics re-
quire careful device decoupling System designers
are interested in 3 supply current issues standby
current levels (I
transient peaks produced by falling and rising edges
of CE Transient current magnitudes depend on the
device outputs’ capacitive and inductive loading
Two-line control and proper decoupling capacitor
selection will suppress transient voltage peaks
Each device should have a 0 1 mF ceramic capacitor
connected between each V
tween its V
inherent-inductance capacitors should be placed as
close as possible to package leads Additionally for
every 8 devices a 4 7 mF electrolytic capacitor
should be placed at the array’s power supply con-
nection between V
will overcome voltage slumps caused by PC board
trace inductances
V
Writing flash memories while they reside in the tar-
get system requires that the printed circuit board
designer pay attention to the V
trace The V
for writing and erasing Use similar trace widths and
layout considerations given to the V
Adequate V
crease V
V
Command Status Registers
Byte write and block erase completion are not guar-
anteed if V
of the Status Register (SR 3) is set to ‘‘1’’ a Clear
Status Register command MUST be issued before
further byte write block erase attempts are allowed
by the WSM Otherwise the Byte Write (SR 4) or
Erase (SR 5) Status bits of the Status Register will
be set to ‘‘1’’s if error is detected RP transitions to
V
operations Data is partially altered in either case
and the command sequence must be repeated after
normal operation is restored Device poweroff or RP
transitions to V
value 10000 for the upper 5 bits
The Command User Interface latches commands as
issued by system software and is not altered by V
or CE transitions or WSM actions Its state upon
powerup after exit from deep powerdown or after
V
IL
CC
PP
CC
during byte write and block erase also abort the
transitions below V
Trace on Printed Circuit Boards
V
PP
PP
PP
PP
PP
voltage spikes and overshoots
PP
RP Transitions and the
drops below V
and GND These high frequency low
supply traces and decoupling will de-
IL
pin supplies the memory cell current
SB
clear the Status Register to initial
) active current levels (I
CC
and GND The bulk capacitor
LKO
PPH
CC
is Read Array Mode
and GND and be-
If the V
PP
CC
power supply
PP
power bus
Status bit
CC
) and
PP
After byte write or block erase is complete even
after V
User Interface must be reset to Read Array mode via
the Read Array command if access to the memory
array is desired
Power Up Down Protection
The M28F008 is designed to offer protection against
accidental block erasure or byte writing during power
transitions Upon power-up the M28F008 is indiffer-
ent as to which power supply V
up first Power supply sequencing is not required
Internal circuitry in the M28F008 ensures that the
Command User Interface is reset to the Read Array
mode on power up
A system designer must guard against spurious
writes for V
active Since both WE and CE must be low for a
command write driving either to V
writes The Command User Interface architecture
provides an added level of protection since altera-
tion of memory contents only occurs after success-
ful completion of the two-step command sequences
Finally the device is disabled until RP is brought to
V
provides an additional level of memory protection
Power Dissipation
When designing portable systems designers must
consider battery power consumption not only during
device operation but also for data retention during
system idle time Flash nonvolatility increases us-
able battery life because the M28F008 does not
consume any power to retain code or data when the
system is off
In addition the M28F008’s deep powerdown mode
ensures low power dissipation even when system
power is applied For example portable PCs and
other power sensitive applications using an array of
M28F008s for solid-state storage can lower RP to
V
sumption If access to the M28F008 is again need-
ed the part can again be read following the t
and t
raised back to V
Only and Write Operations and Figures 8 and 9 for
more information
IH
IL
in standby or sleep modes reducing power con-
regardless of the state of its control inputs This
PHWL
PP
transitions down to V
wakeup cycles required after RP is first
CC
voltages above V
IH
See AC Characteristics Read-
PPL
PP
LKO
or V
the Command
IH
when V
CC
M28F008
will inhibit
powers
PHQV
PP
15
is