ta1383afg TOSHIBA Semiconductor CORPORATION, ta1383afg Datasheet - Page 14

• Manufacturer Part Number: ta1383afg
• Description: Ntsc Chroma Decoder, Multi-point Scan Sync Processor, H/v Frequency Counter Ic For Color Tv
• Manufacturer: TOSHIBA Semiconductor CORPORATION

How To Start I
How To Transmit/Receive Via I
Slave Address: Can Be Changed Using Pin 12.
Start and Stop Conditions
Bit Transmission
Acknowledgement
A6
A6
1
1
Pin 12-GND (GND to 1.2 V): D8H/D9H
Pin 12-6 V (4.8 to 7.2 V): DCH/DDH
SDA from
transmitter
SDA from receiver
SCL from master
clamp pulse period.
After power on, TA1383FG pins 28 and 29 (Cr/Pr/R IN, Cb/Pb/B IN) are in Full-Field Clamp Mode.
Full-Field Clamp Mode is released by writing or reading. And then, clamp is performed only during the
Described below is how to send bus data after power on. Use software to handle the procedure.
1. Turn power on.
2. Transmit all write data.
A5
A5
1
1
A4
A4
0
0
2
SDA
SCL
C Bus
SDA
SCL
A3
A3
1
1
Start condition
S
A2
A2
1
1
S
SDA must not be changed
A1
A1
0
1
1
2
C Bus
A0
A0
0
0
W/R
W/R
0/1
0/1
14
SDA may be changed
Pin 12-3 V (1.8 to 4.2 V): DAH/DBH
Pin 12-V
(V
A6
A6
1
1
CC1
8
= 9 V, V
A5
A5
1
1
Clock pulse for acknowledgement
CC1
Stop condition
High impedance at bit 9
(7.8 to V
A4
A4
P
0
0
9
CC2
= 5 V)
A3
A3
1
1
Low impedance at bit
9 only
CC1
) DEH/DFH
A2
A2
1
1
A1
A1
0
1
TA1383AFG
2005-09-05
A0
A0
1
1
W/R
W/R
0/1
0/1