cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 159
cx28224
Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28224.pdf
(271 pages)
- Current page: 159 of 271
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CX28224/5/9 Data Sheet
28229-DSH-001-D
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0x34—TXCNTL (Transmitted Cell Counter [Low Byte])
0x35—TXCNTM (Transmitted Cell Counter [Mid Byte])
TxCnt[7]
TxCnt[6]
TxCnt[5]
TxCnt[4]
TxCnt[3]
TxCnt[2]
TxCnt[1]
TxCnt[0]
TxCnt[15]
TxCnt[14]
TxCnt[13]
TxCnt[12]
TxCnt[11]
TxCnt[10]
TxCnt[9]
TxCnt[8]
The TXCNTL counter tracks the number of transmitted cells. This byte of the counter
should be read first. The counter is cleared on read.
The TXCNTM counter tracks the number of transmitted cells. The counter is cleared
on read.
Name
Name
Mindspeed Technologies
Transmitted cell counter bit 7.
Transmitted cell counter bit 6.
Transmitted cell counter bit 5.
Transmitted cell counter bit 4.
Transmitted cell counter bit 3.
Transmitted cell counter bit 2.
Transmitted cell counter bit 1.
Transmitted cell counter bit 0 (LSB).
Transmitted cell counter bit 15.
Transmitted cell counter bit 14.
Transmitted cell counter bit 13.
Transmitted cell counter bit 12.
Transmitted cell counter bit 11.
Transmitted cell counter bit 10.
Transmitted cell counter bit 9.
Transmitted cell counter bit 8.
Description
Description
™
Registers
7
-
59
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