cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 225
cx28224
Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28224.pdf
(271 pages)
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CX28224/5/9 Data Sheet
Table 8-1. Microprocessor Timing Table—Asynchronous Read
28229-DSH-001-D
MicroClk
t
t
t
t
t
t
t
t
t
FOOTNOTE:
(1)
(2)
pwh
pwl
s
h
en
pd
dis
enzl
dislz
Label
Timing starts from whichever is asserted last.
Timing relative to whichever goes inactive first.
Microprocessor Clock
Pulse Width High
Pulse Width Low
Setup, MicroAddr[10:0] to the falling edge of (MCS* + MRd*)
Hold, MicroAddr[10:0] from the rising edge of (MCS* + MRd*)
Enable, MicroData[7:0] from the falling edge of (MCS* +
MRd*)
Propagation Delay, MicroData[7:0] from the falling edge of
(MCS* + MRd*)
Disable, MicroData[7:0] from the rising edge of (MCS* +
MRd*)
Enable, MRdy from the falling edge of (MCS* + MRd*)
Disable, MRdy from the falling edge of (MCS* + MRd*)
(1)
(2)
(1)
Description
Mindspeed Technologies
(1)
(1)
(1)
(2)
3 * MicroClk + 15
3 * MicroClk + 15
2.5 * MicroClk
™
2 * MicroClk
Min
—
2
7
2
2
1
Electrical and Mechanical Specifications
3.5 * MicroClk +15
3 * MicroClk +14
Max
50
—
—
—
—
20
20
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
Unit
8
-
3
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