lc89052t Sanyo Semiconductor Corporation, lc89052t Datasheet - Page 22

• Manufacturer Part Number: lc89052t
• Description: Digital Audio Interface Receiver
• Manufacturer: Sanyo Semiconductor Corporation

8.5.5 Data processing upon occurrence of errors
1) Input parity error (a):
2) Input parity error (b):
3) Input parity error (c):
DATAO output pin
Input fs calculation
Channel status data
Sub-code Q data
This section describes the data processing performed when an error occurs. When up to 8 consecutive input parity
The output data when a PLL lock error or 9 or more parity errors occur consecutively are muted.
For the channel status data, the data for the previous block held in 1 bit units is output when an 8 or less parity error
The figure below presents an example of the data processing performed when a parity error occurs.
errors occur, if the transmitted data is PCM audio data, the data is replaced with the corresponding left and right
channel data from the immediately preceding frame. However, if the transmitted data is non-PCM data, the error data
is output as it is. Non-PCM data is based on the data that is detected before the input parity error has occurred, and is
the data for which the channel status bit 1 non-PCM data detection bit is "1". Non-PCM data refers to the data
established when bit 1 non-PCM data detection bit of the channel status turns to high based on the data detected prior
to the occurrence of the input parity error.
occurs successively.
Data and detection flags
Input data
ERROR
DATAO
LRCK
Figure 8.10 Data Processing Example for a Parity Error (When PCM data is received)
An error occurs
L-1 R-1 L-2 R-2 L-3 R-3 L-4 R-4
When 9 or more consecutive parity errors occur
When up to 8 consecutive parity errors occur in audio data
When up to 8 consecutive parity errors occur in non-PCM burst data
L-0 R-0
PLL lock error
Previous data value
Table 8.9 Data Processing when Errors Occur
Low
Low
Low
Low
L-1
R-ch
R-0
L-2 R-2
LC89052T
Input parity error (a)
L-2 R-2 L-2
L-ch R-ch ....
Previous data value
Low
Low
Low
Low
L-5 R-5 L-6 R-6
R-2 L-2 R-2 L-2 R-2
Input parity error (b)
L-7 R-7 L-8 R-8
Previous data
Previous data
Output
Output
Muted after 9 or more
consecutive errors
Input parity error (c)
Previous data
Output
Output
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