w65c22 Western Design Center, Inc., w65c22 Datasheet - Page 43

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w65c22

Manufacturer Part Number
w65c22
Description
W65c22n And W65c22s Versatile Interface Adapter Via Datasheet
Manufacturer
Western Design Center, Inc.
Datasheet

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Symbol
tWHS
tR, tF
tPDH
tCA2
tRS1
tRS2
tRS3
tRS4
tSR1
tSR2
tSR3
tICW
tIPW
tIPS
tICS
tDS
tAL
t21
tIL
Note:
Note:
4.4
Parameter
Rise & Fall Time for CA1, CB1,
CA2 and CB2 Input Signals
Delay
Transition
Transition (Read Handshake or
Pulse Mode
Delay
Transition
Transition (Pulse Mode)
Delay
Transition
Transition
Mode)
Delay
Transition
Negative
Handshake)
Delay
Valid to CB2 Negative Transition
Delay
Transition to CA2 or CB2 Positive
Transition (Write Pulse Mode)
Delay Time, CA1 or CB1 Active
Transition to CA2 or CB2 Positive
Transition (Handshake Mode)
Delay Time Required from CA2
Output to CA1 Active Transition
(Write Handshake Mode)
Set-up Time, Peripheral Data
Valid to CA1 or CB1 Active
Transition (Input Latching)
Shift-Out Delay Time - Time from
PHI2 Falling Edge to CB2 Data
Out
Shift-In Set-up Time - Time from
CB2 Data in to PHI2 Rising Edge
External Shift Clock (CB1) Set-up
Time Relative to PHI2 Trailing
Edge
Pulse Width - PB6 Input Pulse
Pulse Width - CB1 Input Clock
Pulse Spacing - PB6 Input Pulse
Pulse Spacing - CB1 Input Pulse
CA1, CB1 Set Up Prior to
Transition to Arm Latch
Peripheral Data Hold after CA1,
CB1 Transition
Timing Diagrams
See Figure 4-12 for test load
Measurement points are at 50% of VDD unless otherwise specified.
Time,
Time,
Time,
Time,
Time,
Time,
to
to
(Read
to
to
Transition
Peripheral
Clock
Clock
Clock
Clock
CA2
CA2
CA2
CA2
CA1
Handshake
or
Negative
Negative
Negative
Positive
Positive
Positive
Positive
Active
(Write
Data
CB2
tCYC
tCYC
tCYC
tCYC
Min
105
62
88
10
2x
2x
2x
2x
0
-
-
-
-
-
-
-
-
-
-
5.0+/-5%
14 MHz
tCYC
Max
100
100
150
70
75
75
75
35
88
88
Peripheral Interface Timing
-
-
-
-
-
-
-
-
Table 4-4b W65C22S AC
tCYC
tCYC
tCYC
tCYC
Min
155
125
92
2x
2x
2x
2x
20
0
3.3 +/-10%
-
-
-
-
-
-
-
-
-
-
10 MHz
tCYC
Max
100
105
105
135
105
135
220
125
125
43
-
-
-
-
-
-
-
-
tCYC
tCYC
tCYC
tCYC
Min
115
195
150
20
2x
2x
2x
2x
0
-
-
-
-
-
-
-
-
-
-
3.0+/-5%
8 MHz
tCYC
Max
125
130
130
160
130
160
270
160
160
70
-
-
-
-
-
-
-
-
tCYC
tCYC
tCYC
tCYC
Min
240
380
300
20
2x
2x
2x
2x
0
-
-
-
-
-
-
-
-
-
-
2.5+/-5%
4 MHz
tCYC
Max
250
255
255
285
255
285
520
285
285
130
-
-
-
-
-
-
-
-
tCYC
tCYC
tCYC
tCYC
Min
490
780
600
20
2x
2x
2x
2x
0
-
-
-
-
-
-
-
-
-
-
1.8+/-5%
2 MHz
tCYC
Max
1020
500
505
505
535
505
535
535
535
260
-
-
-
-
-
-
-
-
Units
nS
nS
uS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
ns
43
Figure
4-11
4-10
4-11
4-10
4-3
4-4
4-3
4-4
4-5
4-6
4-5
4-6
4-5
4-6
4-6
4-7
4-8
4-9
4-9
4-7
4-7
-

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