A43L8316AV AMICC [AMIC Technology], A43L8316AV Datasheet - Page 9

• Manufacturer Part Number: A43L8316AV
• Description: 128K X 16 Bit X 2 Banks Synchronous DRAM
• Manufacturer: AMICC [AMIC Technology]

Operating AC Parameter
(AC operating conditions unless otherwise noted)
Note: 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time
(September, 2003, Version 1.0)
Symbol
t
t
t
t
t
Number of valid output data
t
t
t
t
RAS(max)
t
RRD(min)
RCD(min)
RAS(min)
CDL(min)
RDL(min)
BDL(min)
CCD(min)
RC(min)
RP(min)
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
and then rounding off to the next higher integer.
Row active to row active delay
Row precharge time
Row active time
Row cycle time
Last data in new col. Address delay
Last data in row precharge
Last data in to burst stop
Col. Address to col. Address delay
RAS to
CAS
Parameter
delay
Latency
CAS
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
8
11
-5
2
3
3
8
2
-
-
-
-
-
-5.5
11
2
3
3
8
2
-
-
-
-
-
Version
100
1
1
1
2
1
AMIC Technology, Corp.
10
-6
2
3
3
7
2
-
-
-
-
-
-7
2
3
2
3
2
6
5
9
7
2
2
A43L8316A
Unit
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
s
Note
1
1
1
1
1
2
2
2
4