M25P16-VME3G STMICROELECTRONICS [STMicroelectronics], M25P16-VME3G Datasheet - Page 53

• Manufacturer Part Number: M25P16-VME3G
• Description: 16 Mbit, low voltage, Serial Flash memory with 50 MHz SPI bus interface
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M25P16
13
Revision history
Table 24.
13-Dec-2002
15-May-2003
24-Sep-2003
17-May-2004
24-Nov-2003
01-Aug-2005
27-Feb-2006
16-Jan-2002
23-Apr-2002
20-Jun-2003
01-Apr-2005
20-Oct-2005
04-Jul-2006
Date
Document revision history
Revision
0.1
0.4
0.5
0.6
0.7
0.8
1.0
2.0
3.0
4.0
5.0
6.0
7
8
Target Specification Document written
Clarification of descriptions of entering Stand-by Power mode from Deep
Power-down mode, and of terminating an instruction sequence or data-
out sequence.
ICC2(max) value changed to 10µA
Typical Page Program time improved. Write Protect setup and hold times
specified, for applications that switch Write Protect to exit the Hardware
Protection mode immediately before a WRSR, and to enter the Hardware
Protection mode again immediately after
MLP8 package added
50MHz operation, and RDID instruction added. Published internally, only
8x6 MLP8 and SO16(300 mil) packages added
t
Reference Voltage changed. Document promoted to Preliminary Data.
Table of contents, warning about exposed paddle on MLP8, and Pb-free
options added.
Value of t
packages. Document promoted to full Datasheet.
MLP8(5x6) package removed. Soldering temperature information
clarified for RoHS compliant devices. Device Grade clarified
Notes 1 and 2 removed from
Small text changes.
Read Identification
Deep Power-down and Read Electronic Signature (RES)
and
paragraph clarified.
Updated Page Program (PP) instructions in
Program (PP)
VFQFPN8 package added (see
thin Fine Pitch Quad Flat Package No lead, 6 × 5 mm, package outline
and
Package No lead, 6 × 5 mm, package mechanical
All packages are ECOPACK®. “Blank” option removed under
Technology.
SO8 Narrow and SO8 Wide packages added (see
mechanical). VDFPN8 package updated (see
8-lead Very thin Dual Flat Package No lead, 8 × 6mm, package
mechanical
scheme.
Figure 4: Bus master and memory devices on the SPI bus
Note 2
Table
PP
, t
Active Power, Stand-by Power and Deep Power-Down modes
Table 18: VFQFPN8 (MLP8) 8-lead Very thin Fine Pitch Quad Flat
SE
20). Small text changes.
added. SO8N package specifications updated (see
and t
VSL
data).
BE
(min) and t
and
revised. SO16 package code changed. Output Timing
Note 1
Table 15: AC characteristics (Grade
(RDID),
BE
added to
(typ) changed. Change of naming for VDFPN8
Deep Power-down (DP)
Table 23: Ordering information
Figure 27: VFQFPN8 (MLP8) 8-lead Very
Changes
Table 23: Ordering information
Page
Table 19: VDFPN8 (MLP8)
programming,
Section 11: Package
data).
and
Revision history
6).
Release from
instructions,
updated and
Figure 29
scheme.
Plating
Page
53/55
and