MB89656AR FUJITSU [Fujitsu Component Limited.], MB89656AR Datasheet - Page 22

• Manufacturer Part Number: MB89656AR
• Description: 8-bit Proprietary Microcontroller
• Manufacturer: FUJITSU [Fujitsu Component Limited.]

22
MB89650AR Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and
bits for control of CPU operations at the time of an interrupt.
H-flag: Set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared
I-flag: Interrupt is allowed when this flag is set to 1. Interrupt is prohibited when the flag is set to 0. Set to 0
IL1, 0: Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is
N-flag: Set if the MSB is set to 1 as the result of an arithmetic operation. Cleared when the bit is set to 0.
Z-flag: Set when an arithmetic operation results in 0. Cleared otherwise.
V-flag: Set if the complement on 2 overflows as a result of an arithmetic operation. Reset if the overflow does
C-flag: Set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared otherwise.
Rule for Conversion of Actual Addresses of the General-purpose Register Area
IL1
0
0
1
1
not occur.
Set to the shift-out value in the case of a shift instruction.
otherwise. This flag is for decimal adjustment instructions.
when reset.
higher than the value indicated by this bit.
Generated addresses
IL0
0
1
0
1
A15
“0”
A14
“0”
A13
“0”
A12
“0”
A11
“0”
Interrupt level
A10
“0”
1
2
3
“0”
A9
“1”
A8
R4
A7
R3
A6
RP
R2
A5
R1
A4
R0
A3
Lower OP codes
A2
b2
Low = no interrupt
b1
A1
High-low
High
A0
b0