IDT7024L IDT [Integrated Device Technology], IDT7024L Datasheet - Page 8

• Manufacturer Part Number: IDT7024L
• Description: HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM
• Manufacturer: IDT [Integrated Device Technology]

IDT7024S/L
HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM
WAVEFORM OF READ CYCLES
NOTES:
1. Timing depends on which signal is asserted last,
2. Timing depends on which signal is de-asserted first,
3. t
4. Start of valid data depends on which timing becomes effective last t
5.
TIMING OF POWER-UP POWER-DOWN
DATA
BUSY
BUSY
SEM
BDD
UB
ADDR
delay is required only in cases where opposite port is completing a write operation to the same address location. For simultaneous read operations
R/
= V
,
OUT
OUT
OE
CE
has no relation to valid output data.
LB
W
IH
.
I
I
CC
CE
SB
t
t
t
t
t
AA
ACE
AOE
LZ
ABE
(5)
(4)
(1)
CE
(4)
(4)
(4)
t
,
PU
CE
OE
,
,
OE
LB
, or
,
LB
50%
UB
, or
t
RC
.
ABE
UB
6.15
, t
t
.
BDD
AOE
, t
(3, 4)
ACE
, t
t
PD
AA
or t
VALID DATA
MILITARY AND COMMERCIAL TEMPERATURE RANGES
BDD
2740 drw 08
50%
.
(4)
t
HZ
(2)
t
OH
2740 drw 07
8