IDT79RC32332 IDT [Integrated Device Technology], IDT79RC32332 Datasheet - Page 15

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IDT79RC32332

Manufacturer Part Number
IDT79RC32332
Description
IDT Interprise Integrated Communications Processor
Manufacturer
IDT [Integrated Device Technology]
Datasheet
Clock Parameters
IDT 79RC32355
(Ta = 0°C to +70°C Commercial, Ta = -40°C to +85°C Industrial, Vcc I/O = +3.3V±5%,V
Internal CPU pipeline clock
CLKP
1
2
3
4
The CPU pipeline clock speed is selected during cold reset by the boot configuration vector (see Table 2).
Ethernet clock (MIIRXCLKP and MIITXCLKP) frequency must be equal to or less than 1/2 CLKP frequency.
USB clock (USBCLKP) frequency must be less than CLKP frequency.
ATM Utopia clock (RXCLKP and TXCLKP) frequency must be equal to or less than 1/2 CLKP frequency.
2,3,4
Parameter
CLKP
1
Tjitter
Frequency
Frequency
Tperiod1
Thigh1
Tlow1
Trise1
Tfall1
Tjitter
Symbol
Tperiod1
none
none
Reference
Figure 4 Clock Parameters Waveform
Edge
Table 3 Clock Parameters
Tjitter
15 of 47
Min
100
15
133MHz
25
6
6
±250
Max
133
67
40
3
3
Thigh1
13.3
Min
100
5.4
5.4
25
150MHz
cc
Tlow1
Core and V
Trise1
±200
Max
150
2.5
2.5
75
40
11.1
Min
cc
100
5.4
5.4
25
180MHz
P = +2.5V±5%)
Tfall1
±200
Max
180
2.5
2.5
90
40
Units
MHz
MHz
ns
ns
ns
ns
ns
ps
Figure 4
Reference
Diagram
May 25, 2004
Timing

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