IDT79RC32332 IDT [Integrated Device Technology], IDT79RC32332 Datasheet - Page 38

• Manufacturer Part Number: IDT79RC32332
• Description: IDT Interprise Integrated Communications Processor
• Manufacturer: IDT [Integrated Device Technology]

Phase-Locked Loop (PLL)
ates aligned clocks. Inherently, PLL circuits are only capable of generating aligned clocks for master input clock (CLKP) frequencies within a limited
range.
PLL Analog Filter
designer provide a filter network of passive components for the PLL power supply.
circuit such as the one shown in Figure 22.
considered as starting points for further experimentation within your specific application.
Recommended Operating Temperature and Supply Voltage
Capacitive Load Deration
IDT 79RC32355
The processor aligns the pipeline clock, PClock, to the master input clock (CLKP) by using an internal phase-locked loop (PLL) circuit that gener-
The storage capacitor required for the Phase-Locked Loop circuit is contained in the RC32355. However, it is recommended that the system
V
Because the optimum values for the filter components depend upon the application and the system noise environment, these values should be
Refer to the
CC
P (PLL circuit power) and V
RC32355 IBIS Model
Commercial
Industrial
1
2
3
4
5
VssP is the phase lock loop ground.
Vss supplies a common ground.
VccI/O is the I/O power.
VccCore is the internal logic power.
VccP is the phase lock loop power.
Grade
SS
which can be found at the IDT web site (www.idt.com).
P (PLL circuit ground) should be isolated from V
Vcc
Vss
1.
0°C to +70°C Ambient
-40°C+ 85°C Ambient
This resistor may be required in noisy circuit environments.
Temperature
10 ohm
Figure 22 PLL Filter Circuit for Noisy Environments
10
1
µ
F
Table 17 Temperature and Voltage
0.1
38 of 47
µ
F
VssP
Vss
0V
0V
100 pF
1
5
CC
V
Core (core power) and V
3.3V±5%
3.3V±5%
cc
I/O
VccP
VssP
RC32355
2
V
cc
2.5V±5%
2.5V±5%
V
cc
Core
P
SS
4
(common ground) with a filter
3
May 25, 2004