HD3-15531B-9 INTERSIL [Intersil Corporation], HD3-15531B-9 Datasheet - Page 4

• Manufacturer Part Number: HD3-15531B-9
• Description: CMOS Manchester Encoder-Decoder
• Manufacturer: INTERSIL [Intersil Corporation]

Pin Description
NUMBER
PIN
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
TYPE
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
DECODER SHIFT
CLOCK
TRANSITION SE-
LECT
NC
COMMAND SYNC
DECODER PARITY
SELECT
DECODER RESET
COUNT C0
GROUND
MASTER RESET
COUNT C2
÷
BIPOLAR ZERO
OUT
OUTPUT INHIBIT
BIPOLAR ONE OUT
SERIAL DATA IN
ENCODER ENABLE
SYNC SELECT
ENCODER PARITY
SELECT
SEND DATA
SEND CLOCK IN
ENCODER SHIFT
CLOCK
NC
COUNT C3
ENCODER CLOCK
DATA SYNC
COUNT C4
COUNT C1
6 OUT
(Continued)
NAME
SECTION
Decoder
Decoder
Decoder
Decoder
Decoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Decoder
Blank
Blank
Both
Both
Both
Both
Both
Both
Both
Output which delivers a frequency (DECODER CLOCK + 1 2), synchronous by
the recovered serial data stream.
A high input to this pin causes the transition finder to synchronize on every tran-
sition of input data. A low input causes the transition finder to synchronize only
on mid-bit transitions.
Output of a high from this pin occurs during output of decoded data which was
preceded by a Command (or Status) synchronizing character.
An input for parity sense, calling for even parity with input high and odd parity
with input low.
A high input to this pin during a rising edge of DECODER SHIFT CLOCK resets
the decoder bit counting logic to a condition ready for a new word.
coded.
the ÷ 6 circuit.
Output from 6:1 divider which is driven by the ENCODER CLOCK.
An active low output designed to drive the zero or negative sense of a bipolar
line driver.
A low on this pin forces pin 25 and 27 high, the inactive states.
An active low output designed to drive the one or positive sense of a bipolar line
driver.
Accepts a serial data stream at a data rate equal to ENCODER SHIFT CLOCK.
A high on this pin initiates the encode cycle. (Subject to the preceding cycle be-
ing complete).
Actuates a Command sync for an input high and Data sync for an input low.
Sets transmit parity odd for a high input, even for a low input.
Is an active high output which enables the external source of serial data.
Clock input at a frequency equal to the data rate X2, usually driven by ÷ 6 output.
Output for shifting data into the Encoder. The Encoder samples SDI pin-28 on
the low-to-high transition of ESC.
Input to the 6:1 divider, a frequency equal to 12 times the data rate is usually
input here.
Output of a high from this pin occurs during output of decoded data which was
preceded by a data synchronizing character.
One of five binary inputs which establish the total bit count to be encoded or de-
Supply pin.
A high on this pin clears 2:1 counters in both encoder and decoder, and resets
Not connected.
See pin 20.
Not connected.
See pin 20.
See pin 20.
See pill 20.
HD-15531
4
DESCRIPTION