em78p5842 ELAN Microelectronics Corp, em78p5842 Datasheet - Page 15
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em78p5842
Manufacturer Part Number
em78p5842
Description
8-bit Micro-controller
Manufacturer
ELAN Microelectronics Corp
Datasheet
1.EM78P5842.pdf
(45 pages)
- Current page: 15 of 45
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__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to change without notice.
PAGE1,2 : (undefined) not allowed to use
PAGE3 (DT2H: the Most Significant Byte ( Bit 1 ~ Bit 0 ) of Duty Cycle of PWM2)
Bit 0 ~ Bit 1 (PWM2[8] ~ PWM2[9]): The Most Significant Byte of PWM1 Duty Cycle
Bit 2 ~ Bit 7 : (undefined) not allowed to use
PORT71 's wakeup function is controlled by IOCF bit 4. It’s falling edge trigger.
X
If enable PLL, CPU will operate at normal mode (high frequency). Otherwise, it will run at green mode
(low frequency, 32768 Hz).
Bit 7: Unused register. Always keep this bit to 0 or some un-expect error will happen!
Next table show the status after wake-up and the wake-up sources list.
PORT70 's wakeup function is controlled by IOCF bit 3. It's falling edge or rising edge trigger (controlled
PORT73 's wakeup function is controlled by IOCF bit 5. It is falling edge trigger.
7
-
by CONT register bit7).
X
6
-
A specified value keeps the PWM1 output to stay at high until the value matches with TMR1.
Wakeup signal
TCC time out
IOCF bit0=1
COUNTER1 time out
IOCF bit1=1
WDT time out
PORT7 (0,1,3)
32.768kHz
Sub-clock
PLL circuit
X
5
-
Fig.4 The relation between 32.768kHz and PLL
X
4
-
SLEEP mode
RA(7,6)=(0,0)
+ SLEP
No function
No function
Reset and jump to
address 0
Reset and Jump to
address 0
CLK2 ~ CLK0
3.58MHz, 14.3MHz
X
3
ENPLL
-
13
X
2
-
1
0
switch
PWM2[9] PWM2[8]
R/W-0
1
System clock
R/W-0
0
EM785840/5841/5842
8-bit Micro-controller
2004/11/10 V1.2
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