l8c201 LOGIC Devices Incorporated, l8c201 Datasheet

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l8c201

Manufacturer Part Number
l8c201
Description
512/1k/2k/4k 9-bit Asynchronous Fifo
Manufacturer
LOGIC Devices Incorporated
Datasheet

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DEVICES INCORPORATED
FEATURES
W
XI
L8C201/202/203/204 B
R
DEVICES INCORPORATED
First-In/First-Out (FIFO) using
Dual-Port Memory
Advanced CMOS Technology
High Speed — to 10 ns Access Time
Asynchronous and Simultaneous
Read and Write
Fully Expandable by both Word
Depth and/or Bit Width
Empty and Full Warning Flags
Half-Full Flag Capability
Auto Retransmit Capability
Package Styles Available:
• 28-pin Plastic DIP
• 32-pin Plastic LCC
• 28-pin Ceramic Flatpack
CONTROL
WRITE
CONTROL
READ
EXPANSION
LOGIC
LOGIC
FLAG
POINTER
WRITE
LOCK
D
DATA OUTPUTS
IAGRAM
DATA INPUTS
512/1K/2K/4K x 9-bit Asynchronous FIFO
RAM ARRAY
THREE-STATE
512 x 9-bit
1K x 9-bit
2K x 9-bit
4K x 9-bit
The L8C201, L8C202, L8C203, and
L8C204 are dual-port First-In/First-
Out (FIFO) memories. The FIFO
memory products are organized as:
Each device utilizes a special algorithm
that loads and empties data on a first-
in/first-out basis. Full and Empty flags
are provided to prevent data overflow
and underflow. Three additional pins
are also provided to allow for unlimited
expansion in both word size and depth.
Depth Expansion does not result in a
flow-through penalty. Multiple devices
are connected with the data and control
signals in parallel. The active device is
determined by the Expansion In (XI)
and Expansion Out (XO) signals which
are daisy chained from device to
device.
BUFFERS
D
Q
L8C201 — 512 x 9-bit
L8C202 — 1024 x 9-bit
L8C203 — 2048 x 9-bit
L8C204 — 4096 x 9-bit
9
DESCRIPTION
8-0
8-0
FF
XO/HF
EF
POINTER
READ
512/1K/2K/4K x 9-bit Asynchronous FIFO
1
RESET
LOGIC
L8C201/202/203/204
RS
FL/RT
The read and write operations are
internally sequential through the use
of ring pointers. No address informa-
tion is required to load and unload
data. The write operation occurs
when the Write (W) signal is LOW.
Read occurs when Read (R) goes
LOW. The nine data outputs go to the
high impedance state when R is
HIGH. Retransmit (RT) capability
allows for reset of the read pointer
when RT is pulsed LOW, allowing for
retransmission of data from the
beginning. Read Enable (R) and Write
Enable (W) must both be HIGH
during a retransmit cycle, and then R
is used to access the data. A Half-Full
(HF) output flag is available in the
single device and width expansion
modes. In the depth expansion
configuration, this pin provides the
Expansion Out (XO) information
which is used to tell the next FIFO that
it will be activated.
These FIFOs are designed to have the
fastest data access possible. Even in
lower cycle time applications, faster
access time can eliminate timing
bottlenecks as well as leave enough
margin to allow the use of the devices
without external bus drivers.
The FIFOs are designed for those
applications requiring asychronous
and simultaneous read/writes in
multiprocessing and rate buffer
applications.
L8C201/202/203/204
FIFO Products
03/04/99–LDS.8C201/2/3/4-H

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l8c201 Summary of contents

Page 1

... DESCRIPTION The L8C201, L8C202, L8C203, and L8C204 are dual-port First-In/First- Out (FIFO) memories. The FIFO memory products are organized as: L8C201 — 512 x 9-bit L8C202 — 1024 x 9-bit L8C203 — 2048 x 9-bit L8C204 — 4096 x 9-bit Each device utilizes a special algorithm that loads and empties data on a first- in/first-out basis ...

Page 2

... If the read pointer is not moved after Reset (RS), the Full Flag (FF) will go LOW after 512 writes for the L8C201, 1024 writes for the L8C202, 2048 writes for the L8C203, and 4096 writes for the L8C204. ...

Page 3

... FIFOs. Care must be taken to assure that the appropriate flag is monitored by each system (i.e monitored on the device when W is used monitored on the device when R is used). Both Depth Expansion and Width Expansion may be used in this mode. 3 L8C201/202/203/204 FIFO Products 03/04/99–LDS.8C201/2/3/4-H ...

Page 4

... Ambient Temp = 25° 4 Test Frequency = 1 MHz (Note 9) Test Condition (Note 5) 4 L8C201/202/203/204 Supply Voltage L8C201/202/203/204 Min Typ 2.4 2.0 –0.5 L8C201/202/203/204 100 110 120 150 FIFO Products 03/04/99–LDS.8C201/2/3/4-H Max Unit V 0 +0.3 0 µA 10 µ ...

Page 5

... DATA-OUT VALID DATA-OUT VALID t WLWL t t WLWH WHWL t t DVWH WHDX DATA-IN VALID t SLWL t SLSH t WHSH t RHSH t SLEL SLHH SLFH 5 L8C201/202/203/204 L8C201/202/203/204– Min Max Min Max Min Max Min ...

Page 6

... F R IRST EAD IGNORED FIRST READ WRITE t RHFH F W IRST RITE IGNORED FIRST WRITE READ t WHEH t RLQV VALID t TLAL t TLTH t AHTH 6 L8C201/202/203/204 L8C201/202/203/204– Min Max Min Max Min Max ...

Page 7

... ULL LAG IMING HALF-FULL OR LESS 512/1K/2K/4K x 9-bit Asynchronous FIFO Over Commercial and Industrial Operating Range (ns) IMING (Note 9) t WHEH t RHFH MORE THAN HALF-FULL t WLHL 7 L8C201/202/203/204 L8C201/202/203/204– Min Max Min Max Min Max Min ...

Page 8

... WRITE TO t ALXL FIRST PHYSICAL LOCATION W R 512/1K/2K/4K x 9-bit Asynchronous FIFO Over Commercial and Industrial Operating Range (Note 11) (Note 11) (Notes 9, 11) (Notes 9, 11) t AHOH t XHXL t ALXL 8 L8C201/202/203/204 L8C201/202/203/204– Min Max Min Max Min Max Min ...

Page 9

... DATA-OUT VALID DATA-OUT VALID t WLWL t t WLWH WHWL t t DVWH WHDX DATA-IN VALID t SLWL t SLSH t WHSH t RHSH t SLEL SLHH SLFH 9 L8C201/202/203/204 L8C201/202/203/204– Min Max Min Max Min ...

Page 10

... R IRST EAD IGNORED FIRST READ WRITE t RHFH F W IRST RITE IGNORED FIRST WRITE READ t WHEH t RLQV VALID t TLAL t TLTH t AHTH 10 L8C201/202/203/204 L8C201/202/203/204– Min Max Min Max ADDITIONAL ADDITIONAL READS WRITES ...

Page 11

... ALF ULL LAG IMING HALF-FULL OR LESS 512/1K/2K/4K x 9-bit Asynchronous FIFO Over Military Operating Range (ns) IMING (Note 9) t WHEH t RHFH MORE THAN HALF-FULL t WLHL 11 L8C201/202/203/204 L8C201/202/203/204– Min Max Min Max Min Max ...

Page 12

... WRITE TO t ALXL FIRST PHYSICAL LOCATION W R 512/1K/2K/4K x 9-bit Asynchronous FIFO Over Military Operating Range (Note 11) (Note 11) (Notes 9, 11) (Notes 9, 11) t AHOH t XHXL t ALXL 12 L8C201/202/203/204 L8C201/202/203/204– Min Max Min Max Min READ FROM ...

Page 13

... Read Pointer 0 Location Zero 0 Location Zero 0 Increment OAD RUTH ABLE EPTH XPANSION INTERNAL STATUS XI Read Pointer (1) Location Zero (1) Location Zero Disabled ( L8C201/202/203/204 EMPTY / IDTH XPANSION ODE Write Pointer EF Location Zero 0 Unchanged X Increment OMPOUND ...

Page 14

... Long high-inductance leads that cause sup- ply bounce must be avoided by bringing the and ground planes directly up to the V CC contactor fingers. A 0.01 µF high frequency capacitor is also required between V ground. To avoid signal reflections, proper terminations must be used L8C201/202/203/204 F 2a. IGURE R 480 OUTPUT + SLSH ...

Page 15

... DEVICES INCORPORATED L8C201 — ORDERING INFORMATION 28-pin — 0.3" wide GND 14 Plastic DIP (P10) Speed 0°C to +70°C — C OMMERCIAL 25 ns L8C201PC25 15 ns ...

Page 16

... DEVICES INCORPORATED L8C201 — ORDERING INFORMATION 32-pin — 0.490" x 0.590" Top FF 9 View Plastic J-Lead Chip Carrier (J6) Speed 0°C to +70°C — C OMMERCIAL 25 ns L8C201JC25 15 ns L8C201JC15 ...

Page 17

... FL/ XO/ CREENING S CREENING 17 L8C201/202/203/204 FL/ ...

Page 18

... Asynchronous FIFO 28-pin FL/ XO/ GND S CREENING S CREENING S CREENING OMPLIANT 18 L8C201/202/203/204 ...

Page 19

... FL/ XO/ CREENING S CREENING 19 L8C201/202/203/204 FL/ ...

Page 20

... Asynchronous FIFO 28-pin FL/ XO/ GND S CREENING S CREENING S CREENING OMPLIANT 20 L8C201/202/203/204 ...

Page 21

... FL/ XO/ CREENING S CREENING 21 L8C201/202/203/204 FL/ ...

Page 22

... FL/ XO/ GND S CREENING S CREENING S CREENING OMPLIANT 22 L8C201/202/203/204 FL/ XO/ ...

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