gc41c501g2-so24i CORERIVER Semiconductor, gc41c501g2-so24i Datasheet - Page 40

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gc41c501g2-so24i

Manufacturer Part Number
gc41c501g2-so24i
Description
4-bit Microcontrollers With Reduced 8051 Architecture
Manufacturer
CORERIVER Semiconductor
Datasheet
CLR @L
CLR A
Appendix A : Instruction Set (8/19)
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
Clears the indirect function flag
addressed by DPL.
F[L] ← 0
Not affected.
1
1
; Assumes P2 contains 0xF.
MOV L, #1
CLR @L
MOV A, #0xD
CJNE A, P2, ERROR ; Check if P2.1 is 0.
Clears the accumulator.
This is an abbreviation of MOV A, #0.
(A) ← 0
Not affected.
1
1
CLR A
1000
0101
0110
0000
; P2.1 ← 0
; (L) ← 1
; (A) ← 13
CLR bit
CLR C
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
Clears the carry flag.
This is the same as "ADD A, #0".
(A) ← (A) + 0
(C) ← 0
1
1
CLR C
Clears a bit in data memory addressed by
DPTR. The bit position of the nibble is obtained
by the least significant two bits of opcode.
M[DP].bit ← 0
Not affected.
1
1
; Assumes M[DP] contains 7.
CLR 2
CJNE @DP, #3, ERROR ; Check result
0001
1000
ATOM1.2 Family
0000
10bb
Preliminary
; M[DP].2 ← 0
[40]

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