ade3700 STMicroelectronics, ade3700 Datasheet - Page 16

• Manufacturer Part Number: ade3700
• Description: Analog Lcd Display Engine For Xga And Sxga Resolutions
• Manufacturer: STMicroelectronics

FM Frequency Synthesizer
16/89
2.2
GLBL_INCLK_GATE_CTRL
GLBL_DK_SRST
GLBL_OSD_POWER_CTRL
GLBL_DOTCLK_GATE_CTRL
Register Name
FM Frequency Synthesizer
The FM Frequency Synthesizer can create a clock up to eight times the crystal input clock using a
digital frequency synthesizer. The modulation period and amplitude are directly controlled by I2C
registers. The I2C interface runs in the LLK_CTRL clock domain, which must be active for access.
The relationship of the output frequency (f
frequency (f
where f
The maximum output frequency of the FM frequency synthesizer is f
Note that native duty cycle of the FM frequency synthesizer is not 50/50, so it is recommended to
either enable the divide-by-two in the fm synthesizer block for frequencies up to f
(typically 108 MHz) or set the output mux to a double wide output mode for pixel clocks above
f
XCLK
x 2
OUT
(1+NDIV)
XCLK
and f
. This will ensure a 50% duty clock on the output.
) is:
XCLK
are in MHz.
0x0022
0x0040
0x0041
0x0042
Addr.
Table 4: Global Registers (Sheet 4 of 4)
f
OUT
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
mode
= f
XCLK
OUT
[7:3]
[2]
[1]
[0]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
[7:1]
[0]
[7:5]
[4]
[3]
[2]
[1]
[0]
Bits
* 2
) to the 32-bit phase_rate value and the crystal
27+NDIV
0x0
0x1
0x1
0x1
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x1
0x1
0x1
0x1
0x1
Default
/ phase_rate
Reserved
Enable DFT clock
Enable DMEAS clock
Enable INCLK to I2C registers
Reserved
PGEN block reset synchronous to
DOTCLK
OMUX block reset synchronous to
DOTCLK
APC block reset synchronous to DOTCLK
OSD block reset synchronous to DOTCLK
GAMMA block reset synchronous to
DOTCLK
OSQ block reset synchronous to DOTCLK
SCALE block reset synchronous to
DOTCLK
Reserved
OSD bypass (when clock disabled)
Reserved
Enable FLK clock
Enable TCON clock
Enable OSD clock
Enable PGEN clock
Enable DOTCLK to I2C registers
XTAL
x 2
Description
(2+NDIV)
XCLK
.
x 2
ADE3700
(1+NDIV)