lxt384 Intel Corporation, lxt384 Datasheet - Page 4

• Manufacturer Part Number: lxt384
• Description: Octal T1/e1/j1 Short Haul Transceiver
• Manufacturer: Intel Corporation

Contents
7.0
8.0
9.0
10.0
11.0
4
6.6
6.7
6.8
6.9
6.10
Operating Mode Summary
7.1
7.2
7.3
7.4
7.5
Registers
8.1
8.2
8.3
JTAG Boundary Scan
9.1
9.2
9.3
9.4
Electrical Characteristics
Timing Characteristics
11.1
11.2
11.3
Jitter Attenuation ................................................................................................. 58
Loopbacks ........................................................................................................... 60
6.7.1
6.7.2
6.7.3
Transmit All Ones Operations ............................................................................. 63
6.8.1
6.8.2
6.8.3
Performance Monitoring ...................................................................................... 65
Intel
Interfacing with 5V Logic ..................................................................................... 67
Hardware Mode................................................................................................... 67
Hardware Mode Settings..................................................................................... 68
Host Processor Modes ........................................................................................ 69
7.4.1
7.4.2
Interrupt Handling................................................................................................ 72
7.5.1
7.5.2
7.5.3
Register Summary .............................................................................................. 73
Register Addresses ............................................................................................. 75
Register Descriptions .......................................................................................... 76
Overview ............................................................................................................. 84
Architecture ......................................................................................................... 84
TAP Controller..................................................................................................... 85
JTAG Register Description.................................................................................. 87
9.4.1
9.4.2
9.4.3
9.4.4
9.4.5
Intel
Host Processor Mode - Parallel Interface Timing.............................................. 107
11.2.1 Intel
11.2.2 Motorola* Processor - Parallel Interface Timing................................... 113
Host Processor Mode - Serial Interface Timing ................................................ 119
...................................................................................................................... 73
®
®
Hitless Protection Switching ...................................................................... 66
LXT384 Transceiver Timing .................................................................... 104
Analog Loopback ................................................................................... 60
Digital Loopback..................................................................................... 61
Remote Loopback .................................................................................. 62
TAOS Generation................................................................................... 63
TAOS Generation with Analog Loopback .............................................. 64
TAOS Generation with Digital Loopback................................................ 64
Host Processor Mode - Parallel Interface............................................... 69
Host Processor Mode - Serial Interface ................................................. 71
Interrupt Sources.................................................................................... 72
Interrupt Enable...................................................................................... 72
Interrupt Clear ........................................................................................ 72
Boundary Scan Register (BSR).............................................................. 87
Analog Port Scan Register (ASR) .......................................................... 92
Device Identification Register (IDR) ....................................................... 92
Bypass Register (BYR) .......................................................................... 92
Instruction Register (IR) ......................................................................... 93
®
Processor - Parallel Interface Timing ......................................... 107
............................................................................................. 84
......................................................................................... 103
...................................................................................... 94
................................................................................... 67
Revision Date: September 22, 2005
Document Number: 248994
Revision Number: 004
Datasheet