lxt384 Intel Corporation, lxt384 Datasheet - Page 9

• Manufacturer Part Number: lxt384
• Description: Octal T1/e1/j1 Short Haul Transceiver
• Manufacturer: Intel Corporation

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Document Number: 248994
Revision Number: 004
Revision Date: September 22, 2005
Introduction to this Document
Audience and Purpose
The audience for this document is design engineers.
The purpose of this document is to provide design information about the Intel
Short-Haul Pulse-Code Modulation Transceiver with Jitter Attenuation (called hereafter the
LXT384 Transceiver).
The rest of this document is organized as follows:
Conventions and Terminology
Balls and pins. This document discusses two packages, both a low-profile octal-flat package (an
LQFP, which uses pins for signals) and a pin ball-grid array (a PBGA, which uses balls for signals).
In this document the term ‘pin’ refers to either a ball or a pin.
Mark. An analog AMI (Alternate Mark Inversion) line-interface signal, containing a digital logic
1. The mark is either a negative or a positive pulse.
Recovered Clock. A clock that is not generated, but is instead derived from received data on a
transceiver. The RTIP/RRING received signal is used to generate RCLK on the transceiver.
X = Don’t care.
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Chapter 2.0, “Product Summary”
Chapter 3.0, “Pin Assignments and Package”
Chapter 4.0, “Multi-Function Pins”
Chapter 5.0, “Signal Descriptions”
Chapter 6.0, “Functional Description”
Chapter 7.0, “Operating Mode Summary”
Chapter 8.0, “Registers”
Chapter 9.0, “JTAG Boundary Scan”
Chapter 10.0, “Electrical Characteristics”
Chapter 11.0, “Timing Characteristics”
Chapter 12.0, “Line-Interface-Unit Circuit Specifications”
Chapter 13.0, “Mask Specifications”
Chapter 14.0, “Jitter Performance”
Chapter 15.0, “Recommendations and Specifications”
Chapter 16.0, “Mechanical Specifications”
Chapter 17.0, “Abbreviations and Acronyms”
Intel
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
®
LXT384 Octal
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