or3l165b Lattice Semiconductor Corp., or3l165b Datasheet - Page 18

• Manufacturer Part Number: or3l165b
• Description: Orca Or3lxxxb Series Field-programmable Gate Arrays
• Manufacturer: Lattice Semiconductor Corp.

ORCA OR3LxxxB Series FPGAs
Timing Characteristics
Table 9. Synchronous Memory Read Characteristics
OR3LxxB Commercial: V
to 3.6 V, V
Note: The table shows worst-case delays. ORCA Foundry reports the delays for individual paths within a group of paths representing
18
Read Operation
Read Operation, Clocking Data into Latch/FF
Kz[3:0], F5[A:D]
SMRD_CYC
REG_DEL
RA4_DEL
RA4_SET
RA4_HLD
RA_HLD
RA_DEL
RA_SET
Symbol
the same timing parameter and may accurately report delays that are less than those listed.
f[6, 4, 2, 0]
Q[3:0]
DD
CK
2 = 2.38 V to 2.63 V, –40 °C
Data Valid After Address (Kz[3:0] to F[6, 4, 2, 0])
Data Valid After Address (F5[A:D] to F[6, 4, 2, 0])
Address to Clock Setup Time (Kz[3:0] to CLK)
Address to Clock Setup Time (F5[A:D] to CLK)
Address from Clock Hold Time (Kz[3:0] from CLK)
Address from Clock Hold Time (F5[A:D] from CLK)
Clock to PFU Output—Register (CLK to Q[6, 4, 2, 0])
Read Cycle Delay
DD
(T
= 3.0 V to 3.6 V, V
J
= 85 °C, V
(continued)
Figure 5. Synchronous Memory Read Cycle
Parameter
DD
<
T
= min, V
A
DD
<
+85 °C.
2 = 2.38 V to 2.63 V, 0 °C
DD
RA4_SET
RA_SET
2 = min)
RA4_DEL
RA_DEL
REG_DEL
RA4_HLD
RA_HLD
<
0.90
0.51
Min Max Min Max
0.0
0.0
—
—
—
—
T
A
-7
<
1.03
0.85
1.22
5.38
70 °C; Industrial: V
—
—
—
—
0.78
0.44
0.0
0.0
—
—
—
—
Lattice Semiconductor
-8
Data Addendum
0.90
0.74
1.06
4.68
—
—
—
—
March 2002
DD
Unit
ns
ns
ns
ns
ns
ns
ns
ns
= 3.0 V
5-4622(F)