hd66100 Renesas Electronics Corporation., hd66100 Datasheet - Page 115

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hd66100

Manufacturer Part Number
hd66100
Description
H8/3867 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Bits 1 and 0: Active (medium-speed) mode clock select (MA1, MA0)
Bits 1 and 0 choose ø
speed) mode and sleep (medium-speed) mode. MA1 and MA0 should be written in active (high-
speed) mode or subactive mode.
Bit 1
MA1
0
0
1
1
2. System control register 2 (SYSCR2)
SYSCR2 is an 8-bit read/write register for power-down mode control.
Bits 7 to 5: Reserved bits
These bits are reserved; they are always read as 1, and cannot be modified.
Bit 4: Noise elimination sampling frequency select (NESEL)
This bit selects the frequency at which the watch clock signal (ø
pulse generator is sampled, in relation to the oscillator clock (ø
pulse generator. When ø
Bit 4
NESEL
0
1
100
Bit
Initial value
Read/Write
Bit 0
MA0
0
1
0
1
Description
Sampling rate is ø
Sampling rate is ø
7
1
osc
/128, ø
OSC
Description
ø
ø
ø
ø
osc
osc
osc
osc
= 2 to 6 MHz, clear NESEL to 0.
osc
6
1
/16
/32
/64
/128
OSC
OSC
/64, ø
/16
/4
osc
5
1
/32, or ø
NESEL
R/W
osc
4
1
/16 as the operating clock in active (medium-
DTON
R/W
3
0
OSC
W
) generated by the subclock
) generated by the system clock
MSON
R/W
2
0
SA1
R/W
1
0
(initial value)
(initial value)
R/W
SA0
0
0

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