SI3200-X-FS SILABS [Silicon Laboratories], SI3200-X-FS Datasheet - Page 20

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SI3200-X-FS

Manufacturer Part Number
SI3200-X-FS
Description
Manufacturer
SILABS [Silicon Laboratories]
Datasheet
Si3220/25
20
FSYNC
PCLK
Figure 4. GCI Highway Interface Timing Diagram (4.096 MHz PCLK Mode)
DRX
DTX
Acceptable Region
t
su1
Figure 5. Transmit and Receive Path SNDR
Frame 0,
Bit 0
t
d1
Frame 0,
t
h1
Bit 0
Rev. 1.2
t
su2
t
d2
t
c
t
h2
t
fs
t
r
t
f
t
d3

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