D485505G NEC [NEC], D485505G Datasheet - Page 16

• Manufacturer Part Number: D485505G
• Description: LINE BUFFER 5K-WORD BY 8-BIT
• Manufacturer: NEC [NEC]

(Output)
(Input)
RSTW
(Input)
(Input)
(Input)
(Input)
RSTR
WCK
4.3 Double-speed Conversion
2 cycle) for a write operation (f
Caution
RCK
Remark RE, WE = “L” level
16
D
D
OUT
IN
Figure 4.6 shows an example timing chart of double-speed and twice reading operation (f
0
The read operation collide with the write operation on the same line, last n bits output data
(5,048–n to 5,048) in the first read operation will be undefined (see Figure 4.6 Double-speed
Conversion Timing Chart).
Undefined bits mentioned above depend on the cycle time.
0
1
1
2
2
(5,048 Cycle)
t
AC
Figure 4.6 Double-speed Conversion Timing Chart
1H
W
0 1 2
= 5,048 cycle).
Read cycle time
First read cycle
(5,048 Cycle)
25 ns
35 ns
n bits output data will be undefined.
1H
Data Sheet M10059EJ7V0DS00
5046 5047
5046 5047
5046 5047
0'
0 1 2
0'
Second read cycle
1'
Undefined bits
(5,048 Cycle)
1'
2'
21 bits
15 bits
1H
2'
(5,048 Cycle)
5046 5047
2H
0' 1' 2'
First read cycle
(5,048 Cycle)
n bits output data will be undefined.
2H
R
5046' 5047'
= 2f
5046' 5047'
W
5046' 5047'
, 5,048 by
PD485505
0"
0' 1'
0"