D485505G NEC [NEC], D485505G Datasheet - Page 6

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D485505G

Manufacturer Part Number
D485505G
Description
LINE BUFFER 5K-WORD BY 8-BIT
Manufacturer
NEC [NEC]
Datasheet

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Operation-related Restriction
If t
Remark This timing chart describes only the delay bits restriction, and does not defines the WE, RE, RSTW, RSTR
6
WCK
RCK
D
WAR
Following restriction exists to read data written in a write cycle.
Read the written data after an elapse of 1/2 write cycle + t
D
OUT
IN
impedance
is not satisfied, the output data may undefined.
High
signals.
0
0
1
1/2 write cycle
1
Figure 2.1 Delay Bits Restriction Timing Chart
2
High impedance
2
3
Data Sheet M10059EJ7V0DS00
3
t
WAR
WAR
since the write cycle ends (see Figure 2.1).
t
AC
0
0
1
1
2
2
PD485505
3

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