m65761fp Renesas Electronics Corporation., m65761fp Datasheet - Page 4

• Manufacturer Part Number: m65761fp
• Description: Assp>ics For Audio Accessory>karaoke Processors Qm-coder
• Manufacturer: Renesas Electronics Corporation.

M65761FP
Pin Description
Host bus I/F
Context I/F
Others
Note:
REJ03F0234-0200 Rev.2.00 Sep 14, 2007
Page 4 of 33
Image
Classification
data
I/F
Most of the context I/F signals are used in conjunction with the image data I/F signals.
The input buffers of the input terminals (I and IO) are at TTL level.
Options are as follows.
(U: with pull-up resistors, D: with pull-down resistors, S: Schmitt trigger)
Numbers (2, 4, 8) of the BUF column of the output terminals (O and IO) indicate current value. (one of 2, 4, or 8
mA)
Parallel
Serial
RESET
CS
A0 to 3
BHE
WR
RD
D0 to 15
DMARQ
DMAAK
INTR
BUS16
PD0 to 31
PDRQ
PDAK
PDRD
PDWR
PRDY
PTIM
PXCK
PXCKO
SVID
RVID
CX0 to 11
PEUPE
SPIX
RPIX
XCLK
XWAIT
XRDY
XTIM
MCLK
TEST0, 1
V
Pin Name
CC
/GND
I/O
IO
IO
—
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
BUF
US
US
US
US
US
US
US
US
DS
U2
—
S
S
S
U
U
U
U
U
8
2
2
2
2
4
2
2
4
2
H/W reset signal
Chip select signal
Internal register address select signal
High-order (D8 to 15) access signal
Write strobe signal
Read strobe signal
I/O data signal (D0 to 7 used on 8-bit bus)
Code data DMA request signal
Code data DMA acknowledge signal
Interrupt request signal
8-bit bus (D0 to 7) and 16-bit bus (D0 to 15) function select bus
Parallel image I/O bus (PD0 to 15 used on 16-bit bus)
Image data DMA request signal
Image data DMA acknowledge signal
Image data read strobe signal
Image data write strobe signal
Image data 1-line I/O start ready signal
Image data 1-line transfer section signal
Image data transfer clock signal
Image data transfer sync clock signal
Image data input signal
Image data output signal
Context input (CX0 can be fed back inside LSI)
PE RAM up date enable (learning function ON/OFF)
Coded image data input signal
Decoded image data output signal
Context data transfer clock signal
Context data transfer wait signal
Context data 1-stripe I/O start ready signal
Context data 1-stripe transfer section signal
Master clock input signal
Test signal (should be connected to GND when normally used)
Power supply (+5 V)/ground
Function
(= PD0 to 11)
(= PRDY)
(= PD15)
(= RVID)
(= PTIM)
(= SVID)