k8d6316u Samsung Semiconductor, Inc., k8d6316u Datasheet - Page 16

• Manufacturer Part Number: k8d6316u
• Description: 64m Bit 8m X8/4m X16 Dual Bank Nor Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

K8D6x16UTM / K8D6x16UBM
FLASH MEMORY
DEVICE OPERATION
Byte/Word Mode
If the BYTE pin is set at logical "1" , the device is in word mode, DQ0-DQ15 are active. Otherwise the BYTE pin is set at logical "0" ,
the device is in byte mode, DQ0-DQ7 are active. DQ8-DQ14 are in the High-Z state and DQ15 pin is used as an input for the LSB
(A-1) address pin.
Read Mode
The K8D6316U is controlled by Chip Enable (CE), Output Enable (OE) and Write Enable (WE). When CE and OE are low and WE
is high, the data stored at the specified address location,will be the output of the device. The outputs are in high impedance state
whenever CE or OE is high.
Standby Mode
The K8D6316U features Stand-by Mode to reduce power consumption. This mode puts the device on hold when the device is dese-
lected by making CE high (CE = V
). Refer to the DC characteristics for more details on stand-by modes.
IH
Output Disable
The device outputs are disabled when OE is High (OE = V
). The output pins are in high impedance state.
IH
Automatic Sleep Mode
K8D6316U features Automatic Sleep Mode to minimize the device power consumption. Since the device typically draws 10 A of
the current in Automatic Sleep Mode, this feature plays an extremely important role in battery-powered applications. When
addresses remain steady for t
+50ns, the device automatically activates the Automatic Sleep Mode. In the sleep mode, output data
AA
is latched and always available to the system. When addresses are changed, the device provides new data without wait time.
t
+ 50ns
AA
Address
Outputs
Data
Data
Data
Data
Data
Data
Auto Sleep Mode
Figure 1. Auto Sleep Mode Operation
Autoselect Mode
The K8D6316U offers the Autoselect Mode to identify manufacturer and device type by reading a binary code. The Autoselect Mode
allows programming equipment to automatically match the device to be programmed with its corresponding programming algorithm.
In addition, this mode allows the verification of the status of write protected blocks. This mode is used by two method. The one is high
voltage method to be required V
(8.5V~12.5V) on address pin A9. When A9 is held at V
and the bank address or block address is
ID
ID
asserted, the device outputs the valid data via DQ pins(see Table 9 and Figure 2). The rest of addresses except A0, A1 and A6 are
Don t Care. The other is autoselect command method that the autoselect code is accessible by the commamd sequence without V
ID.
The manufacturer and device code may also be read via the command register. The Command Sequence is shown in Table 8 and
Figure 3. The autoselect operation of block protect verification is initiated by first writing two unlock cycle. The third cycle must con-
tain the bank address and autoselect command (90H). If Block address while (A6, A1, A0) = (0,1,0) is finally asserted on the address
pin, it will produce a logical "1" at the device output DQ0 to indicate a write protected block or a logical "0" at the device output DQ0
to indicate a write unprotected block. To terminate the autoselect operation, write Reset command (F0H) into the command register.
16
Revision 1.5
March 2005