74HCT2G00DP,125 NXP Semiconductors, 74HCT2G00DP,125 Datasheet
74HCT2G00DP,125
Specifications of 74HCT2G00DP,125
74HCT2G00DP-G
935271850125
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74HCT2G00DP,125 Summary of contents
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Dual 2-input NAND gate Rev. 04 — 3 July 2008 1. General description The 74HC2G00 and 74HCT2G00 are high-speed Si-gate CMOS devices. They provide two 2-input NAND gates. The HC device has CMOS input switching levels and supply ...
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... NXP Semiconductors 4. Marking Table 2. Marking code Type number 74HC2G00DP 74HCT2G00DP 74HC2G00DC 74HCT2G00DC 74HC2G00GD 74HCT2G00GD 5. Functional diagram mna712 Fig 1. Logic symbol 6. Pinning information 6.1 Pinning 74HC2G00 74HCT2G00 GND 001aai255 Fig 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 74HC_HCT2G00_4 Product data sheet 74HC2G00 ...
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... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin 1A 1B GND 4 1Y Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...
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... NXP Semiconductors 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V) ...
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... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at T Symbol Parameter 74HCT2G00 V HIGH-level input IH voltage V LOW-level input IL voltage V HIGH-level output OH voltage V LOW-level output OL voltage I input leakage current I I supply current CC I additional supply ...
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... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); all typical values are measured at T Symbol Parameter Conditions 74HCT2G00 t propagation delay nA and nB to nY; see transition time power dissipation V = GND capacitance [ the same as t and PLH PHL [ the same as t and t ...
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... NXP Semiconductors negative positive Test data is given in Table Definitions for test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 7. Load circuit for measuring switching times Table 10. Test data Type ...
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... NXP Semiconductors 13. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.00 0.75 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...
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... NXP Semiconductors VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0. 0.12 0.00 0.60 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 0.5 mm terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.35 2.1 mm 0.5 0.00 0.15 1.9 OUTLINE VERSION IEC SOT996 Fig 10. Package outline SOT996-2 (XSON8U) ...
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... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Added type number 74HC2G00GD and 74HCT2G00GD (XSON8U package) ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 14 Abbreviations ...