74HCT2G00DP,125 NXP Semiconductors, 74HCT2G00DP,125 Datasheet - Page 3

IC DUAL 2-IN NAND GATE 8TSSOP

74HCT2G00DP,125

Manufacturer Part Number
74HCT2G00DP,125
Description
IC DUAL 2-IN NAND GATE 8TSSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheet

Specifications of 74HCT2G00DP,125

Number Of Circuits
2
Package / Case
8-TSSOP
Logic Type
NAND Gate
Number Of Inputs
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Product
NAND
Logic Family
HCT
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
12 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74HCT2G00DP-G
74HCT2G00DP-G
935271850125
NXP Semiconductors
Table 3.
7. Functional description
Table 4.
[1]
8. Limiting values
Table 5.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
74HC_HCT2G00_4
Product data sheet
Symbol
1A, 2A
1B, 2B
GND
1Y, 2Y
V
Input
nA
L
L
H
H
Symbol
V
I
I
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
CC
D
H = HIGH voltage level; L = LOW voltage level.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55 C the value of P
For VSSOP8 package: above 110 C the value of P
For XSON8 package: above 45 C the value of P
Pin description
Function table
Limiting values
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
dynamic power dissipation
6.2 Pin description
Pin
1, 5
2, 6
4
7, 3
8
[1]
Description
data input
data input
ground (0 V)
data output
supply voltage
nB
L
H
L
H
Conditions
V
V
V
T
amb
tot
I
O
O
tot
< 0.5 V or V
< 0.5 V or V
= 0.5 V to (V
derates linearly with 2.4 mW/K.
tot
derates linearly with 2.5 mW/K.
= 40 C to +125 C
Rev. 04 — 3 July 2008
derates linearly with 8 mW/K.
I
O
> V
CC
> V
CC
+ 0.5 V)
74HC2G00; 74HCT2G00
CC
+ 0.5 V
+ 0.5 V
Output
nY
H
H
H
L
[1]
[1]
[1]
[1]
[1]
[2]
Dual 2-input NAND gate
Min
-
-
-
-
-
0.5
50
65
© NXP B.V. 2008. All rights reserved.
Max
+7.0
25
50
-
+150
300
20
20
Unit
V
mA
mA
mA
mA
mA
mW
C
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