UPD16449N NEC [NEC], UPD16449N Datasheet - Page 17

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UPD16449N

Manufacturer Part Number
UPD16449N
Description
SOURCE DRIVER FOR 240-OUTPUT TFT-LCD
Manufacturer
NEC [NEC]
Datasheet
5.2 Sample and Hold Circuit
circuit in the timing shown below. Swa1 through Swb2 are reset by the RESET signal and change at the rising and
falling edges of the INH signal (refer to 1. BLOCK DIAGRAM.).
5.3 Write Operation Timing
dynamic range is 4.3 V MIN. (V
in malfunction. Perform V
signal is stable enough to operate. Make sure to evaluate this output operation sufficiently.
The sample and hold circuit samples and holds the video input signals C1 through C3 selected by the multiplexer
The sampled video signals are written to the LCD panel by output currents I
While INH = H, do not stop shift clocks CLI1 through CLI3.
Therefore, performing V
The output operation of this IC is controlled by INH signals.
INH = Hi-Z
INH = Connected with internal circuit (switch sample and hold circuit at the falling edge.)
RESET
Swa1
Swa2
Swb1
Swb2
Data
INH
undifined
COM
COM
inversion while INH = L causes current flow to these IC output pins, which may result
in version during INH = H (Hi-Z) and start output operation of the next line after the V
DD2
= 5.0 V).
undifined
ON
Data Sheet S15677EJ1V0DS
ON
VOL
and I
VOH
via output buffer. The
PD16449
COM
17

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