MP7542AD EXAR [Exar Corporation], MP7542AD Datasheet - Page 6

no-image

MP7542AD

Manufacturer Part Number
MP7542AD
Description
5 V CMOS 4-Bit Input, 12-Bit Digital-to-Analog Converter
Manufacturer
EXAR [Exar Corporation]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MP7542AD
Quantity:
6 500
Part Number:
MP7542AD
Manufacturer:
HAR
Quantity:
2 245
APPLICATION NOTES
Refer to Section 8 for Applications Information
Interface Logic Information
output device.
coded device address, and is derived by decoding the 14 higher
order address bits. A0 and A1 are the MP7542 operation ad-
dress bits, and are decoded internally in the MP7542 to point to
the desired loading operation (i.e. load high byte, middle byte,
low byte or DAC register). See Table 1.
RAM.
to be cleared asynchronously to 0000 0000 0000. When operat-
MP7542
The MP7542 is designed to interface as a memory-mapped
A typical system configuration is shown below. CS is the de-
All data loading operations are identical to the write cycle of a
Additionally, the CLR input allows the MP7542 DAC register
Rev. 2.00
or comparable
8085
ADDR/DATA
Figure 2. 8085/MP7542 Interface (Memory Mapped Output)
ADDR
ALE
WR
FROM SYSTEM RESET
(8)
(8) AD0-7
+5 V
8212
AD0 AD1 AD2 AD3
ADDRESS BUS (16)
DATA
6
A0-15
A0
ing the MP7542 in a unipolar mode a CLEAR sets the DAC out-
put to zero scale output. In the bipolar mode a CLEAR causes
the DAC output to go to –V
DB3
DB2
DB1
DB0
A0
In summary:
1. The MP7542 DAC register can be asynchronously
2. Each MP7542 requires only 4 bits of memory.
3. Any of the four basic loading operations (i.e. load low
A1
cleared with the CLR input.
byte data register, middle byte data register, high byte
data register or 12-bit DAC register) are accomplished
by executing a memory WRITE operation to the applica-
ble address location for the required DAC operation.
A1
MP7542
CLR
WR
Address
Decode
A2 - 15
CS
REF
.
ADDRESS (16)
DATA (8)
DECODED A2 - 15
CHIP SELECT
USED AS

Related parts for MP7542AD