kac-9638 ETC-unknow, kac-9638 Datasheet - Page 19

• Manufacturer Part Number: kac-9638
• Description: Kodak Kac-9638 Cmos Image Sensor
• Manufacturer: ETC-unknow

IMAGE SENSOR SOLUTIONS
Functional Description
8.0
The KAC-9638 allows for both fine and coarse black level
adjustment. Coarse adjustment is made using the PIXELOFF-
SET register and only needs to be done once at power up. Fine
offset adjustment is done on a row basis and can be accom-
plished either automatically using the on chip black level com-
pensation circuit or manually by disabling the on chip black level
compensation circuit.
8.1
To ensure maximum performance of the CMOS image sensor,
the natural offset of the pixel array needs to be minimized.
Coarse adjustment is made using the PIXELOFFSET register
and only needs to be done once at power up. This procedure is
explained in detail in KAC-9648 Application Note 4.
8.2
The offset channel can provide up to 255 levels of black level
and offset adjustment. To manually adjust the black level and
offset the BlkLevEn bit in the BLKLEVCONFIG register should
be set to a logic 1. Eight bit offset values can then be pro-
grammed to register OFFSET.
8.3
Automatic black level and offset adjustment mode is enabled by
setting the BlkLevEn bit in the BLKLEVCONFIG register to a
logic 0.
Figure 30 illustrates the automatic black level and offset com-
pensation circuit contained within the sensor. For every row, the
digitized values of the middle 8 black pixels (of the 24 columns
of black pixels) are acquired and fed to the compensation level
calculator circuit. This circuit is a digital first order exponential
averaging filter. It calculates the compensation level (cmpl) that
is required to ensure that for pixels that are optically black, the
black level at the output of the ADC is equal to the desired black
level. The desired black level (ClkTarget) can be programmed in
the BLKTARGET register.
The black level control loop not only controls the black level of
the pixels in the sensor array, but also controls the offset of the
PGA and A/D in the system. The convergence rate of the can-
cellation loop can be set by programming the BlkRate parameter
located in the BLKLEVCONFIG register. Small values of the
BlkRate parameter ensure a fast convergence. High values of
the BlkRate parameter reduce the noise in the calculated com-
pensation level. The optimal setting of the BlkRate parameter is
the result of a compromise between convergence speed after
power up and image quality.
KAC-9638
www.kodak.com/go/imagers 585-722-4385
all CHx
Figure 30: Digital Black Level & Offset Adjustment Loop
Pixels
BLACK LEVEL & OFFSET ADJUSTMENT
Coarse Black Level and Offset Adjustment
Manual Black Level and Offset Adjustment
Auto Black Level and Offset Adjustment
+
DAC
8 bit
CHx
cmpl Level Calc
BlkRate
Comp
(continued)
ADC
BlkTraget
Black Pixel
Acquisition
10
Output
Data
19
PWD&RST register.
To power up the sensor a logic zero can be asserted on the pwn
pin or by writing to the PwDn bit in the PWD&RST register.
It will take a few milliseconds for all the circuits to power up. The
power management register contains a bit indicating when the
sensor is ready for use. During this time the sensor cannot be
used for capturing images. A status bit in the power manage-
ment register will indicate when the sensor is ready for use.
To ensure minimum power down currents, the internal bang gap
circuit should be turned off before powering down the sensor.
To switch off the sensor’s internal bandgap, the following
sequence of codes should be written to the sensor via the I
9.0
9.1
Upon power up an on-chip power on reset block will ensure that
the sensor is initialized to its reset state. After power up the sen-
sor can be reset by asserting a logic 0 on the resetb pin or by
writing to the SenReset bin in the PWD&RST register.
Furthermore, all state machines contained in the sensors inte-
grated timing and control block can be reset by writing to the
RstzSoft bit in the OPCTRL register.
9.2
The KAC-9638 is equipped with an on-board power manage-
ment system allowing the analog and digital circuitry to be
switched off (power down) and on (power up) at any time.
The sensor can be put into power down mode by asserting a
logic one on the pwn pin or by writing to the PwDn bit in the
compatible interface before power down
Before the sensor can be powered up the its internal bandgap
needs to be switched back on.
To switch the sensor’s internal bandgap circuit on, the following
sequence needs to be applied to the I
after power up to ensure correct operation.
SYSTEM MANAGMENT
System Reset
Power Up and Down
Address
(Hex)
INTREG2
POWCTRL
Address
(Hex)
POWCTRL
OPCTRL
INTREG2
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Data
(Hex)
86
07
00
Data
(Hex)
01
82
2
C compatible interface
2
C