edd51321dbh-ts Elpida Memory, Inc., edd51321dbh-ts Datasheet - Page 39

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edd51321dbh-ts

Manufacturer Part Number
edd51321dbh-ts
Description
512m Bits Ddr Mobile Ram
Manufacturer
Elpida Memory, Inc.
Datasheet
A Write Command to the Bust Stop Command Interval: To Interrupt the Write Operation
WRITE to BST Command Interval (Same bank, same ROW address)
Preliminary Data Sheet E1398E31 (Ver. 3.1)
Command
Command
DQS
/CK
DM
DQ
CK
DQS
/CK
DM
DQ
CK
WRIT
WRIT
t0
t0
Data will be written
NOP
in0
t1
BST
in0
Data will be written
t1
in1
[WRITE to BST delay = 1 clock cycle]
[WRITE to BST delay = 2 clock cycle]
in1
BST
in2
t2
t2
Following data will not be written.
in3
t3
Following data will not be written.
t3
39
t4
t4
t5
NOP
t5
NOP
EDD51321DBH-TS
t6
t6
BL = 4 or longer
BL = 8 or longer
t7
t7

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