DS2174 MAXIM [Maxim Integrated Products], DS2174 Datasheet - Page 14

• Manufacturer Part Number: DS2174
• Description: EBERT
• Manufacturer: MAXIM [Maxim Integrated Products]

Control Register 3 (Address = 2h)
Control Register 4 (Address = 3h)
SYMBOL
SYMBOL
CLK_INV
(MSB)
TEST
COUNT
(MSB)
SEED
TEST
TEST
RAM
PL7
R/W
PL7
PL6
PL5
PL4
PL3
PL2
PL1
PL0
PL8
TEST
Pattern Length Bit 7. Bit 7 of [8:0] end address of repetitive pattern data.
Pattern Length Bit 6. Bit 6 of [8:0] end address of repetitive pattern data.
Pattern Length Bit 5. Bit 5 of [8:0] end address of repetitive pattern data.
Pattern Length Bit 4. Bit 4 of [8:0] end address of repetitive pattern data.
Pattern Length Bit 3. Bit 3 of [8:0] end address of repetitive pattern data.
Pattern Length Bit 2. Bit 2 of [8:0] end address of repetitive pattern data.
Pattern Length Bit 1. Bit 1 of [8:0] end address of repetitive pattern data.
Pattern Length Bit 0. Bit 0 of [8:0] end address of repetitive pattern data.
Factory Use. Must be set to 0 for proper operation.
Factory Use. Must be set to 0 for proper operation.
TCLKO Invert.
0 = TCLKO polarity is normal
1 = TCLKO polarity is inverted
Read/Write Select. This bit is used with the RAM bit to read or write the
RAM.
0 = Write to the RAM
1 = Read from the RAM
RAM Select. This bit should be set when repetitive pattern data is being
loaded into the RAM. See flowchart in Section 4 for a description of this
process.
0 = BERT state machine has control of the RAM
1 = Parallel port has read and write access to the RAM
Select Bit for Registers Ah–Fh.
0 = Registers Ah–Fh refer to bit count registers.
1 = Registers Ah–Fh refer to error count registers.
Select Bit for Registers 5h–8h.
0 = Registers 5h–8h refer to tap select registers.
1 = Registers 5h–8h refer to preload seed registers.
Pattern Length Bit 8. Bit 8 of [8:0] End Address of Repetitive Pattern Data.
PL6
CLK_INV
PL5
R/W
PL4
DESCRIPTION
DESCRIPTION
RAM
14 of 24
PL3
COUNT
PL2
SEED
PL1
(LSB)
(LSB)
PL8
PL0
DS2174