DS1244Y-120 DALLAS [Dallas Semiconductor], DS1244Y-120 Datasheet - Page 3

• Manufacturer Part Number: DS1244Y-120
• Description: 256K NV SRAM with Phantom Clock
• Manufacturer: DALLAS [Dallas Semiconductor]

PHANTOM CLOCK
REGISTER INFORMATION
The Phantom Clock information is contained in 8 regis-
ters of 8 bits, each of which is sequentially accessed one
bit at a time after the 64–bit pattern recognition se-
quence has been completed. When updating the Phan-
tom Clock registers, each register must be handled in
groups of 8 bits. Writing and reading individual bits with-
PHANTOM CLOCK REGISTER DEFINITION Figure 1
NOTE:
The pattern recognition in Hex is C5, 3A, A3, 5C, C5, 3A, A3, 5C. The odds of this pattern being accidentally dupli-
cated and causing inadvertent entry to the Phantom Clock is less than 1 in 10
Clock LSB to MSB.
BYTE 0
BYTE 1
BYTE 2
BYTE 3
BYTE 4
BYTE 5
BYTE 6
BYTE 7
7
1
0
1
0
1
0
1
0
6
1
0
0
1
1
0
0
1
5
0
1
1
0
0
1
1
0
4
0
1
0
1
0
1
0
1
in a register could produce erroneous results. These
read/write registers are defined in Figure 2.
Data contained in the Phantom Clock register is in
binary coded decimal format (BCD). Reading and writ-
ing the registers is always accomplished by stepping
through all 8 registers, starting with bit 0 of register 0 and
ending with bit 7 of register 7.
3
0
1
0
1
0
1
0
1
2
1
0
0
1
1
0
0
1
19
. This pattern is sent to the Phantom
1
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
VALUE
HEX
C5
3A
A3
5C
C5
3A
A3
5C
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