ra8835 Topway Display, ra8835 Datasheet - Page 33

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ra8835

Manufacturer Part Number
ra8835
Description
Dot Matrix Lcd Controller
Manufacturer
Topway Display
Datasheet

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RAiO TECHNOLOGY INC.
Version 1.7
7-2-3 Display Memory Access
Display memory
Microprocessor
Microprocessor
used while the RA8835 series is in sleep mode.
The RA8835 series supports a form of pipelined processing, in which the microprocessor
synchronizes its processing to the RA8835 series timing. When writing, the microprocessor first
issues the MWRITE command. It then repeatedly writes display data to the RA8835 series using
the system bus timing. This ensures that the microprocessor is not slowed down even if the display
memory access times are slower than the system bus access times. See Figure 7-1A.
When reading, the microprocessor first issues the MREAD command, which causes the RA8835
series to load the first read data into its output buffer. The microprocessor then reads data from the
RA8835 series using the system bus timing. With each read, the RA8835 series reads the next
data item from the display memory ready for the next read access. See Figure 7-1B.
Note: A possible problem with the display memory read cycle is that the system bus access time,
t
only make repeated reads if the read loop time exceeds the RA8835 series cycle time, t
If it does not, NOP instructions may be inserted in the program loop. t
are given in section 7-2.
ACC
VRW
, does not depend on the display memory access time, t
VRW
VD0 to VD7
VD0 to VD7
D0 to D7
D0 to D7
VR/ W
VR/ W
WR
WR
RD
Figure 7-1A: Display Memory Write Cycle
Figure 7-1B: Display Memory Read Cycle
Command write
Command write
33/86
Data write
t
CYC
Data Read
Data write
t
CYC
ACV
Dot Matrix LCD Controller
. The microprocessor may
Data Read
ACC
www.raio.com.tw
, t
ACV
RA8835
and t
CYC
limits
CYC
.

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