ra8835a RAIO Technology Inc., ra8835a Datasheet - Page 35

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ra8835a

Manufacturer Part Number
ra8835a
Description
Dot Matrix Lcd Controller
Manufacturer
RAIO Technology Inc.
Datasheet

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RAiO TECHNOLOGY INC.
Version 1.0
7-2-2 Internal Register Access
7-2-3 Display Memory Access
Microprocessor
The SYSTEM SET and SLEEP IN commands can be used to perform input/output to the RA8835A
series independently of the system clock frequency. These are the only commands that can be
used while the RA8835A series is in sleep mode.
The RA8835A series supports a form of pipelined processing, in which the microprocessor
synchronizes its processing to the RA8835A series timing. When writing, the microprocessor first
issues the MWRITE command. It then repeatedly writes display data to the RA8835A series using
the system bus timing. This ensures that the microprocessor is not slowed down even if the display
memory access times are slower than the system bus access times. See Figure 7-1A.
When reading, the microprocessor first issues the MREAD command, which causes the RA8835A
series to load the first read data into its output buffer. The microprocessor then reads data from the
RA8835A series using the system bus timing. With each read, the RA8835A series reads the next
data item from the display memory ready for the next read access. See Figure 7-1B.
Note: A possible problem with the display memory read cycle is that the system bus access time,
t
ACC
, does not depend on the display memory access time, t
VRW
VD0 to VD7
D0 to D7
VR/ W
WR
Figure 7-1A: Display Memory Write Cycle
Figure 7-1B: Display Memory Read Cycle
Command write
35/88
Data write
t
CYC
Data write
ACV
Dot Matrix LCD Controller
. The microprocessor may
RA8835A
www.raio.com.tw

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