ra8835a RAIO Technology Inc., ra8835a Datasheet - Page 37

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ra8835a

Manufacturer Part Number
ra8835a
Description
Dot Matrix Lcd Controller
Manufacturer
RAIO Technology Inc.
Datasheet

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RAiO TECHNOLOGY INC.
Version 1.0
7-4 Static RAM
7-5 Supply Current during Display Memory Access
The figure below shows the interface between an 8Kx 8 static RAM and the RA8835A series. Note that
bus buffers are required if the bus is heavily loaded.
Note : If the bus loading is too much, use a bus buffer.
The 24 address and data lines of the RA8835A series cycle at one-third of the oscillator frequency, f
The charge and discharge current on these pins, I
exceeds I
Where C is the capacitance of the display memory bus, V is the operating voltage, and f is the
operating frequency. If V
per line:
To reduce current flow during display memory accesses, it is important to use low-power memory, and
to minimize both the number of devices and the parasitic capacitance.
OPR
, it can be estimated by:
RA8835
VA13 toVA15
VA0 to VA12
VD0 to VD7
OPR
WRD
VWR
= 5.0V, f = 1.0 MHz, and the display memory bus capacitance is 1.0 pF
Figure 7-3: Static RAM Interface
I
VOP
IVOP
120 mA / MHz x pF
37/88
A-C
HC138
Note
C V f
Y
VOP
V
, is given by the equation below. When I
DD
CS1
CE2
A0 to A12
WR
OE
I/O1 to I/O8
Compatible
2764-pin
memory
Dot Matrix LCD Controller
RA8835A
www.raio.com.tw
OSC
VOP
.

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