ra8835a RAIO Technology Inc., ra8835a Datasheet - Page 44

• Manufacturer Part Number: ra8835a
• Description: Dot Matrix Lcd Controller
• Manufacturer: RAIO Technology Inc.

RAiO TECHNOLOGY INC.
Version 1.0
7-10-3 Display Scan Timing
VCE
￠
VA
0
Figure 7-15 shows the basic timing of the RA8835A series. One display memory read cycle takes
nine periods of the system clock, ψ 0 (f
When reading, the display memory pauses at the end of each line for (TC/R - C/R) display
memory read cycles, though the LCD drive signals are still generated. TC/R may be set to any
value within the constraints imposed by C/R, f
be used to fine tune the frame frequency. The microprocessor may also use this pause to access
the display memory data.
Note: The divider adjustment interval (R) applies to both the upper and lower screens even if
W/S = 1. In this case, LP is active only at the end of the lower screen’s display interval.
Frame
period
Character read interal
Figure 7-16: Relationship Between TC/R and C/R
Figure 7-15: Display Memory Basic Read Cycle
T0
Graphics read interal
Display read cycle interal
Line 1
(L/F)
44/88
LP
OSC
T1
2
3
). This cycle repeats (C/R + 1) times per display line.
OSC
, f
Display period
FR
TC/R
C/R
, and the size of the LCD panel, and it may
Graphics generator
‧
‧
‧
‧
0
0
0
0
read interal
T2
Divider frequency
Dot Matrix LCD Controller
period
R
R
R
R
RA8835A
www.raio.com.tw