HSC-DAC-EVALCZ AD [Analog Devices], HSC-DAC-EVALCZ Datasheet - Page 4
![no-image](/images/no-image-200.jpg)
HSC-DAC-EVALCZ
Manufacturer Part Number
HSC-DAC-EVALCZ
Description
10-/12-Bit, Low Power, Broadband MxFE
Manufacturer
AD [Analog Devices]
Datasheet
1.HSC-DAC-EVALCZ.pdf
(60 pages)
- Current page: 4 of 60
- Download datasheet (2Mb)
AD9961/AD9963
T
decimation, unless otherwise noted.
Table 2. Rx Path Specifications
Parameter
Rx ADC DC CHARACTERISTICS
Rx ADC AC SPECIFICATIONS
RXCML OUTPUTS
Rx DIGITAL FILTER CHARACTERISTICS
MIN
Resolution
Differential Nonlinearity
Gain Error
Offset Error
Input Voltage Range
Input Capacitance
Maximum Sample Rate
Spurious Free Dynamic Range
Two-Tone Intermodulation Distortion
Signal-to-Noise Ratio
Output Voltage
Output Current
2× Decimation
Latency (ADC Clock Cycles)
Passband Ripple; f
Stop-Band Rejection (f
f
f
f
f
f
f
f
to T
IN
IN
IN1
IN1
IN
IN
IN
= 10.1 MHz
= 70.1 MHz
= 10.1 MHz
= 30.1 MHz
= 70.1 MHz
= 10 MHz, f
= 29 MHz, f
MAX
, RX33V = TXVDD = CLK33V = DRVDD = AUX33V = 3.3 V. All LDOs enabled, ADC sample rate = 100 MSPS. No
IN2
IN2
OUT
= 11 MHz
= 32 MHz
/f
DAC
DATA
(0.4 × f
± 0.4 × f
DATA
DATA
)
)
Rev. 0 | Page 4 of 60
Min
100
49
0.2
70
AD9961
Typ
10
0.1
±1
±0.5
1.56
8
77
75
78
76
61
60
60
1.4
Max
0.1
Min
100
49
0.2
70
AD9963
Typ
12
0.3
±1
±0.5
1.56
8
77
73
82
80
68
67
66
1.4
Max
0.1
Unit
Bits
LSB
%FSR
%FSR
V p-p diff
pF
MSPS
dBc
dBc
dBc
dBc
dBFS
dBFS
dBFS
V
mA
Cycles
f
dB
OUT
/f
DAC
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