UPD77110GC NEC [NEC], UPD77110GC Datasheet - Page 56

• Manufacturer Part Number: UPD77110GC
• Description: 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS
• Manufacturer: NEC [NEC]

(2)
Clock
Timing requirements
Switching characteristics
56
CLKIN cycle time
CLKIN high-level width
CLKIN low-level width
CLKIN rise/fall time
Internal clock cycle time
requirements
Internal clock cycle
CLKOUT cycle time
CLKOUT width
CLKOUT rise/fall time
CLKOUT delay time
PD77111, 77112
Notes 1. m: Multiple, n: Division ratio
Note m: Multiple, n: Division ratio, l: HALT division ratio
operating condition range)
PD77111, 77112 AC Characteristics (T
Parameter
Parameter
2. This is the range in which the PLL is locked (stably oscillates). Input t
3. Input t
Note 3
Note 1
Note
cCX
so that the value of (t
Symbol
Symbol
t
t
t
t
t
t
t
wCXH
t
cC (R)
t
wCXL
wCO
rfCX
t
cCO
rfCO
dCO
cCX
cC
IV
IV
During normal operation
In HALT mode
During
normal
operation
In HALT mode
IV
IV
cCX
DD
DD
DD
DD
PLL lock
range
Data Sheet U12801EJ4V0DS00
= 1.8 to 2.7 V
= 2.3 to 2.7 V
= 1.8 to 2.7 V
= 2.3 to 2.7 V
A
m
=
Note 2
Condition
Condition
n = 1, or even number
n = odd number
(other than 1)
n) satisfies this condition.
40 to +85 C, with IV
IV
to 2.7 V
IV
to 2.7 V
DD
DD
= 1.8
= 2.3
t
t
t
cCX
cCX
cCX
25
10
MIN.
MIN.
12.5
12.5
13.3
25
25
m n 3
m
2
m
m
DD
3
3
and EV
t
t
cCX
cCX
cCX
PD77110, 77111, 77112
TYP.
TYP.
within this range.
t
n m l
cC
n
DD
m
within recommended
50
50
MAX.
MAX.
20
15
5
5
m
m
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns