PLL520-17 PhaseLink (PLL), PLL520-17 Datasheet
PLL520-17
Related parts for PLL520-17
PLL520-17 Summary of contents
Page 1
... SEL2^ OE VCON GND ^: Internal pull-up OUTPUT ENABLE LOGICAL LEVELS Part # PLL520-18 PLL520-17 PLL520- input: Logical states defined by PECL levels for PLL520-18 Logical states defined by CMOS levels for PLL520-17/- Universal Low Phase Noise IC’ SEL0 SEL1 GND ...
Page 2
... Frequency control input (0.3V to 3.0V) P GND. True output PECL (PLL520-18) or LVDS (PLL520-19) O (N/C for PLL520-17) Complementary output PECL (PLL520-18) or LVDS (PLL520-19) O (CMOS out for PLL520-17). Multiplier selector pins. These pins have an internal pull-up that will default I SEL to ‘1’ when not connected to GND. P +3.3V VDD. Pin #15 Pin #16 ...
Page 3
... SYMBOL CONDITIONS CX+ 65MHz to 130MHz CX- (VDD=3.3V Fund. SYMBOL CONDITIONS T From power valid VCXOSTB XTAL C /C < 300 VCON 3.3V, at room temp. VCON = 0 to 3.3V 0V VCON 3.3V, -3dB PLL520-17/-18/-19 Universal Low Phase Noise IC’s MIN. MAX -0 -0 -65 150 S ...
Page 4
... Integrated 12 kHz to 20 MHz at 77.76MHz Integrated 12 kHz to 20 MHz at 155.52MHz Integrated 12 kHz to 20 MHz at 622.08MHz @10Hz @100Hz -75 -95 -75 -95 -75 -95 PLL520-17/-18/-19 Universal Low Phase Noise IC’s MIN. TYP. MAX. 100/80/40 3.13 3. MIN ...
Page 5
... 12mA (Standard drive -4mA (Standard drive) OHC OH At TTL level (Standard drive) SYMBOL CONDITIONS 0.8V ~ 2.0V with 10 pF load 0.3V ~ 3.0V with 15 pF load PLL520-17/-18/-19 Universal Low Phase Noise IC’s MIN. TYP. MAX. 2.4 0.4 V – 0 MIN. TYP. MAX. 1.15 3.7 Rev 4/09/02 Page 5 ...
Page 6
... CONDITIONS R = 100 (see figure LVDS Transistion Time Waveform OUT 0V (Differential) OUT 80 DIFF 20 PLL520-17/-18/-19 Universal Low Phase Noise IC’s MIN. TYP. MAX. 247 355 454 -50 50 1.4 1.6 0.9 1.1 1.125 1.2 1.375 -5.7 -8 MIN. TYP. MAX. 0.2 0.7 1.0 ...
Page 7
... PECL t r @80/20% - PECL t f PECL Output Skew VDD OUT 2.0V 50% OUT PECL Transistion Time Waveform DUTY CYCLE PLL520-17/-18/-19 Universal Low Phase Noise IC’s MIN. MAX. V – 1.025 DD V – 1.620 DD MIN. TYP. MAX. 0.6 1.5 0.5 1.5 t SKEW Rev 4/09/02 Page 7 UNITS ...
Page 8
... Preliminary TSSOP Min. Max. - 1.20 0.05 0.15 0.19 0.30 0.09 0.20 4.90 5.10 4.30 4.50 6.40 BSC 0.45 0.75 A1 0.65 BSC e 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL520- PLL520-17/-18/-19 Universal Low Phase Noise IC’ TEMPERATURE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE O=TSSOP S=SOIC Rev 4/09/02 Page 8 ...